uart_test_syn.prd

来自「自己实用Verilog编写的UART程序」· PRD 代码 · 共 14 行

#-- Synplicity, Inc.
#-- Version Synplify Pro 8.6.2H
#-- Project file C:\Actelprj\UART\synthesis\uart_test_syn.prd
#-- Written on Mon Mar 19 10:00:27 2007

#
### Watch Implementation type ###
#
watch_impl -all
#
### Watch Implementation properties ###
#
watch_prop -clear