div.rpt

来自「用VHDL语言实现通用计算器设计」· RPT 代码 · 共 1,011 行 · 第 1/3 页

RPT
1,011
字号
   -      2     -    B    23        OR2                0    4    0    1  :1695
   -      8     -    B    22        OR2                0    4    0    1  :1696
   -      1     -    B    22        OR2    s           0    4    0    1  ~1712~1
   -      5     -    B    22        OR2    s           2    1    0    1  ~1712~2
   -      4     -    B    18        OR2    s           1    3    0    4  ~1757~1
   -      1     -    B    13       AND2    s   !       1    1    0    5  ~1832~1
   -      2     -    B    19        OR2                0    4    0    1  :1845
   -      1     -    B    19        OR2                0    4    0    1  :1846
   -      6     -    B    19        OR2                0    4    0    1  :1860
   -      4     -    B    19        OR2                0    4    0    1  :1861
   -      7     -    B    17        OR2                0    4    0    1  :1875
   -      5     -    B    17        OR2                0    4    0    1  :1876
   -      2     -    B    17        OR2                0    4    0    1  :1889
   -      3     -    B    13       AND2    s   !       0    3    0    2  ~1982~1


Code:

s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register


Device-Specific Information:                                   c:\work\div.rpt
div

** FASTTRACK INTERCONNECT UTILIZATION **

Row FastTrack Interconnect:

          Global         Left Half-      Right Half-
         FastTrack       FastTrack       FastTrack 
Row     Interconnect    Interconnect    Interconnect    Input Pins     Output Pins     Bidir Pins
A:       0/ 96(  0%)     0/ 48(  0%)     0/ 48(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
B:       6/ 96(  6%)     0/ 48(  0%)    29/ 48( 60%)    5/16( 31%)      4/16( 25%)     0/16(  0%)
C:       0/ 96(  0%)     0/ 48(  0%)     0/ 48(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)


Column FastTrack Interconnect:

         FastTrack                                 
Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
02:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
03:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
04:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
05:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
06:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
07:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
08:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
11:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
12:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
13:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
14:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
15:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
16:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
17:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
18:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
19:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
20:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
21:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
22:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
23:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
24:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                                   c:\work\div.rpt
div

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       28         clk


Device-Specific Information:                                   c:\work\div.rpt
div

** EQUATIONS **

a0       : INPUT;
a1       : INPUT;
a2       : INPUT;
a3       : INPUT;
a4       : INPUT;
a5       : INPUT;
a6       : INPUT;
a7       : INPUT;
b0       : INPUT;
b1       : INPUT;
b2       : INPUT;
b3       : INPUT;
clk      : INPUT;
str      : INPUT;

-- Node name is ':49' = 'ain0' 
-- Equation name is 'ain0', location is LC4_B17, type is buried.
ain0     = DFFE( _EQ001, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ001 =  _LC2_B17 & !_LC2_B18
         #  _LC2_B18 &  _LC3_B17;

-- Node name is ':48' = 'ain1' 
-- Equation name is 'ain1', location is LC6_B17, type is buried.
ain1     = DFFE( _EQ002, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ002 = !_LC2_B18 &  _LC5_B17
         # !_LC2_B18 &  _LC7_B17
         #  _LC2_B18 &  _LC8_B17;

-- Node name is ':47' = 'ain2' 
-- Equation name is 'ain2', location is LC8_B19, type is buried.
ain2     = DFFE( _EQ003, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ003 = !_LC2_B18 &  _LC4_B19
         # !_LC2_B18 &  _LC6_B19
         #  _LC2_B18 &  _LC7_B19;

-- Node name is ':46' = 'ain3' 
-- Equation name is 'ain3', location is LC5_B19, type is buried.
ain3     = DFFE( _EQ004, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ004 =  _LC1_B19 & !_LC2_B18
         # !_LC2_B18 &  _LC2_B19
         #  _LC2_B18 &  _LC3_B22;

-- Node name is ':45' = 'ain4' 
-- Equation name is 'ain4', location is LC1_B23, type is buried.
ain4     = DFFE( _EQ005, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ005 =  a4 &  _LC2_B18 &  str
         #  ain4 & !str
         #  ain4 & !_LC2_B18;

-- Node name is ':44' = 'ain5' 
-- Equation name is 'ain5', location is LC1_B24, type is buried.
ain5     = DFFE( _EQ006, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ006 =  a5 &  _LC2_B18 &  str
         #  ain5 & !str
         #  ain5 & !_LC2_B18;

-- Node name is ':43' = 'ain6' 
-- Equation name is 'ain6', location is LC3_B24, type is buried.
ain6     = DFFE( _EQ007, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ007 =  a6 &  _LC2_B18 &  str
         #  ain6 & !str
         #  ain6 & !_LC2_B18;

-- Node name is ':37' = 'atem0' 
-- Equation name is 'atem0', location is LC4_B22, type is buried.
atem0    = DFFE( _EQ008, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ008 =  _LC1_B22 & !_LC2_B18
         # !_LC2_B18 &  _LC2_B22
         #  _LC2_B18 &  _LC5_B22;

-- Node name is ':36' = 'atem1' 
-- Equation name is 'atem1', location is LC5_B23, type is buried.
atem1    = DFFE( _EQ009, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ009 = !_LC2_B18 &  _LC8_B22
         # !_LC2_B18 &  _LC2_B23
         #  _LC2_B18 &  _LC3_B23;

-- Node name is ':35' = 'atem2' 
-- Equation name is 'atem2', location is LC2_B24, type is buried.
atem2    = DFFE( _EQ010, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ010 = !_LC2_B18 &  _LC8_B20
         # !_LC2_B18 &  _LC4_B24
         #  _LC2_B18 &  _LC5_B24;

-- Node name is ':34' = 'atem3' 
-- Equation name is 'atem3', location is LC8_B24, type is buried.
atem3    = DFFE( _EQ011, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ011 = !_LC2_B18 &  _LC6_B24
         # !_LC2_B18 &  _LC2_B20
         #  _LC2_B18 &  _LC7_B24;

-- Node name is ':41' = 'btem0' 
-- Equation name is 'btem0', location is LC6_B13, type is buried.
btem0    = DFFE( _EQ012, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ012 =  b0 & !_LC1_B13
         #  btem0 &  _LC4_B18;

-- Node name is ':40' = 'btem1' 
-- Equation name is 'btem1', location is LC6_B23, type is buried.
btem1    = DFFE( _EQ013, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ013 =  b1 & !_LC1_B13
         #  btem1 &  _LC4_B18;

-- Node name is ':39' = 'btem2' 
-- Equation name is 'btem2', location is LC4_B14, type is buried.
btem2    = DFFE( _EQ014, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ014 =  b2 & !_LC1_B13
         #  btem2 &  _LC4_B18;

-- Node name is ':38' = 'btem3' 
-- Equation name is 'btem3', location is LC5_B14, type is buried.
btem3    = DFFE( _EQ015, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ015 =  b3 & !_LC1_B13
         #  btem3 &  _LC4_B18;

-- Node name is ':61' = 'n0' 
-- Equation name is 'n0', location is LC7_B13, type is buried.
n0       = DFFE( _EQ016, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ016 =  _LC3_B13 &  n0
         # !_LC3_B13 & !n0 & !n1;

-- Node name is ':60' = 'n1' 
-- Equation name is 'n1', location is LC5_B13, type is buried.
n1       = DFFE( _EQ017, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ017 =  _LC3_B13 &  n1
         # !_LC3_B13 &  n0 & !n1;

-- Node name is ':33' = 'state0' 
-- Equation name is 'state0', location is LC8_B13, type is buried.
state0   = DFFE( _EQ018, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ018 =  _LC1_B18 & !n0 &  n1
         # !_LC1_B13;

-- Node name is ':32' = 'state1' 
-- Equation name is 'state1', location is LC8_B18, type is buried.
state1   = DFFE( _EQ019, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ019 = !_LC1_B14 & !_LC2_B18 &  _LC6_B18
         #  _LC1_B18 & !_LC2_B18;

-- Node name is ':31' = 'state2' 
-- Equation name is 'state2', location is LC7_B18, type is buried.
state2   = DFFE( _EQ020, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ020 =  _LC1_B14 &  _LC6_B18;

-- Node name is 's0' 
-- Equation name is 's0', type is output 
s0       =  _LC2_B13;

-- Node name is 's1' 
-- Equation name is 's1', type is output 
s1       =  _LC1_B17;

-- Node name is 's2' 
-- Equation name is 's2', type is output 
s2       =  _LC4_B13;

-- Node name is 's3' 
-- Equation name is 's3', type is output 
s3       =  _LC3_B19;

-- Node name is 'y0' 
-- Equation name is 'y0', type is output 
y0       =  _LC6_B22;

-- Node name is 'y1' 
-- Equation name is 'y1', type is output 
y1       =  _LC6_B20;

-- Node name is 'y2' 
-- Equation name is 'y2', type is output 
y2       =  _LC3_B20;

-- Node name is 'y3' 
-- Equation name is 'y3', type is output 
y3       =  _LC8_B14;

-- Node name is '|sub4:u1|adder:add|:14' 
-- Equation name is '_LC7_B23', type is buried 
_LC7_B23 = LCELL( _EQ021);
  _EQ021 = !btem0
         #  atem0;

-- Node name is '|sub4:u1|adder:add~62|:14' 
-- Equation name is '_LC4_B23', type is buried 
_LC4_B23 = LCELL( _EQ022);
  _EQ022 =  atem1 & !btem0
         # !btem0 & !btem1
         #  atem0 &  atem1
         #  atem0 & !btem1
         #  atem1 & !btem1;

-- Node name is '|sub4:u1|adder:add~93|:14' 
-- Equation name is '_LC2_B14', type is buried 
_LC2_B14 = LCELL( _EQ023);
  _EQ023 =  atem2 &  _LC4_B23
         # !btem2 &  _LC4_B23
         #  atem2 & !btem2;

-- Node name is '|sub4:u1|adder:add~116|:14' 
-- Equation name is '_LC1_B14', type is buried 
_LC1_B14 = LCELL( _EQ024);
  _EQ024 =  atem3 &  _LC2_B14
         # !btem3 &  _LC2_B14
         #  atem3 & !btem3;

-- Node name is ':15' 
-- Equation name is '_LC3_B19', type is buried 
_LC3_B19 = DFFE( _EQ025, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ025 =  ain2 & !_LC3_B18
         #  _LC3_B18 &  _LC3_B19;

-- Node name is ':17' 
-- Equation name is '_LC4_B13', type is buried 
_LC4_B13 = DFFE( _EQ026, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ026 =  ain1 & !_LC3_B18
         #  _LC3_B18 &  _LC4_B13;

-- Node name is ':19' 
-- Equation name is '_LC1_B17', type is buried 
_LC1_B17 = DFFE( _EQ027, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ027 =  ain0 & !_LC3_B18
         #  _LC1_B17 &  _LC3_B18;

-- Node name is ':21' 
-- Equation name is '_LC2_B13', type is buried 
_LC2_B13 = DFFE( _EQ028, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ028 =  _LC1_B14 & !_LC3_B18
         #  _LC2_B13 &  _LC3_B18;

-- Node name is ':23' 
-- Equation name is '_LC8_B14', type is buried 
_LC8_B14 = DFFE( _EQ029, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ029 = !_LC2_B18 & !_LC6_B18 &  _LC7_B14
         #  _LC6_B18 &  _LC8_B14
         #  _LC2_B18 &  _LC8_B14;

-- Node name is ':25' 
-- Equation name is '_LC3_B20', type is buried 
_LC3_B20 = DFFE( _EQ030, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ030 =  _LC3_B14 & !_LC3_B18
         #  _LC3_B18 &  _LC3_B20;

-- Node name is ':27' 
-- Equation name is '_LC6_B20', type is buried 
_LC6_B20 = DFFE( _EQ031, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ031 = !_LC3_B18 &  _LC8_B23
         #  _LC3_B18 &  _LC6_B20;

-- Node name is ':29' 
-- Equation name is '_LC6_B22', type is buried 
_LC6_B22 = DFFE( _EQ032, GLOBAL( clk),  VCC,  VCC,  VCC);

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