📄 sub41.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.0 9/14/2000
-- Compiled: 12/05/2007 22:50:06
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "sub41"
BEGIN
DEVICE = "EPF10K10LC84-4";
"a0" : INPUT_PIN = 42 ;
"a1" : INPUT_PIN = 43 ;
"a2" : INPUT_PIN = 71 ;
"a3" : INPUT_PIN = 2 ;
"b0" : INPUT_PIN = 44 ;
"b1" : INPUT_PIN = 1 ;
"b2" : INPUT_PIN = 72 ;
"b3" : INPUT_PIN = 73 ;
"ci" : INPUT_PIN = 84 ;
"co" : OUTPUT_PIN = 17 ;
"S0" : OUTPUT_PIN = 19 ;
"S1" : OUTPUT_PIN = 18 ;
"S2" : OUTPUT_PIN = 16 ;
"S3" : OUTPUT_PIN = 69 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry0" : LOCATION = LC2_A1 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry1" : LOCATION = LC4_A1 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry2" : LOCATION = LC6_A1 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry3" : LOCATION = LC3_A1 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|:66" : LOCATION = LC7_A1 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|:70" : LOCATION = LC5_A1 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|:71" : LOCATION = LC1_A1 ;
"|sub:1|lpm_add_sub:lpm_add_sub_component|addcore:adder|:72" : LOCATION = LC8_A1 ;
END;
INTERNAL_INFO "sub41"
BEGIN
DEVICE = EPF10K10LC84-4;
OD3P42 : LORAX = "1:FB3|2:FH3R0,PA5R0C0->LC2_A1,->LC7_A1||";
OD5P43 : LORAX = "1:FB5|2:CH1R0,PA7R0C0->LC4_A1,->LC5_A1||";
OH3R0P71 : LORAX = "1:G37R0,PA1R0C0->LC6_A1,->LC1_A1|";
OD1P2 : LORAX = "1:FB1|2:FH1R0,PA20R0C0->LC3_A1,->LC8_A1||";
OD2P44 : LORAX = "1:FB2|2:FH2R0,PA6R0C0->LC2_A1,->LC7_A1||";
OD4P1 : LORAX = "1:FB4|2:CH0R0,PA19R0C0->LC4_A1,->LC5_A1||";
OH2R0P72 : LORAX = "1:G46R0,PA4R0C0->LC6_A1,->LC1_A1|";
OH0R0P73 : LORAX = "1:G10R0,PA11R0C0->LC3_A1,->LC8_A1|";
OD0P84 : LORAX = "1:FB0|2:FH0R0,PA0R0C0->LC2_A1,->LC7_A1||";
LC3_A1 : LORAX = "1:MSW2R0C0,HHL3R0->OH10R0P17|";
LC7_A1 : LORAX = "1:MSW6R0C1,HHL32R0->OH14R0P19|";
LC5_A1 : LORAX = "1:MSW4R0C0,HHL41R0->OH12R0P18|";
LC1_A1 : LORAX = "1:MSW0R0C0,HHL22R0->OH8R0P16|";
LC8_A1 : LORAX = "1:MSW7R0C1,G58R0->OH7R0P69|";
LC2_A1 : LORAX2 = "X, OD0P84, OD2P44, OD3P42";
LC4_A1 : LORAX2 = "X, OD5P43, OD4P1, LC2_A1";
LC6_A1 : LORAX2 = "X, OH3R0P71, OH2R0P72, LC4_A1";
LC3_A1 : LORAX2 = "X, OH0R0P73, OD1P2, LC6_A1";
LC7_A1 : LORAX2 = "X, OD0P84, OD3P42, OD2P44";
LC5_A1 : LORAX2 = "X, OD5P43, OD4P1, LC2_A1";
LC1_A1 : LORAX2 = "X, OH3R0P71, OH2R0P72, LC4_A1";
LC8_A1 : LORAX2 = "X, OH0R0P73, OD1P2, LC6_A1";
END;
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