📄 counter.map.rpt
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; cmpconst.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/cmpconst.inc ;
; lpm_counter.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/lpm_counter.inc ;
; alt_synch_counter.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/alt_synch_counter.inc ;
; alt_synch_counter_f.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/alt_counter_f10ke.inc ;
; alt_counter_stratix.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/alt_counter_stratix.inc ;
; db/cntr_62i.tdf ; yes ; Auto-Generated Megafunction ; E:/test_20/t1/db/cntr_62i.tdf ;
; db/cntr_spi.tdf ; yes ; Auto-Generated Megafunction ; E:/test_20/t1/db/cntr_spi.tdf ;
; db/cntr_o3i.tdf ; yes ; Auto-Generated Megafunction ; E:/test_20/t1/db/cntr_o3i.tdf ;
; db/cntr_cmi.tdf ; yes ; Auto-Generated Megafunction ; E:/test_20/t1/db/cntr_cmi.tdf ;
; sld_rom_sr.vhd ; yes ; Encrypted Megafunction ; c:/altera/72/quartus/libraries/megafunctions/sld_rom_sr.vhd ;
; sld_hub.vhd ; yes ; Encrypted Megafunction ; c:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd ;
; db/decode_ogi.tdf ; yes ; Auto-Generated Megafunction ; E:/test_20/t1/db/decode_ogi.tdf ;
; sld_dffex.vhd ; yes ; Encrypted Megafunction ; c:/altera/72/quartus/libraries/megafunctions/sld_dffex.vhd ;
+----------------------------------+-----------------+------------------------------+---------------------------------------------------------------------------+
+------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+--------------------------+
; Resource ; Usage ;
+---------------------------------------------+--------------------------+
; Total logic elements ; 605 ;
; -- Combinational with no register ; 195 ;
; -- Register only ; 178 ;
; -- Combinational with a register ; 232 ;
; ; ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 221 ;
; -- 3 input functions ; 75 ;
; -- 2 input functions ; 106 ;
; -- 1 input functions ; 22 ;
; -- 0 input functions ; 3 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 537 ;
; -- arithmetic mode ; 68 ;
; -- qfbk mode ; 0 ;
; -- register cascade mode ; 0 ;
; -- synchronous clear/load mode ; 24 ;
; -- asynchronous clear/load mode ; 213 ;
; ; ;
; Total registers ; 410 ;
; Total logic cells in carry chains ; 77 ;
; I/O pins ; 18 ;
; Total memory bits ; 640 ;
; Maximum fan-out node ; altera_internal_jtag~TDO ;
; Maximum fan-out ; 248 ;
; Total fan-out ; 2527 ;
; Average fan-out ; 4.02 ;
+---------------------------------------------+--------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+------------------------------------------------------------------------------------------------------+-------------+--------------+-------------+--------------+---------+-----------+-----------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; DSP 36x36 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ; Library Name ;
+------------------------------------------------------------------------------------------------------+-------------+--------------+-------------+--------------+---------+-----------+-----------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |counter ; 605 (79) ; 410 ; 640 ; 0 ; 0 ; 0 ; 0 ; 18 ; 0 ; 195 (46) ; 178 (0) ; 232 (33) ; 77 (32) ; 0 (0) ; |counter ; work ;
; |sld_hub:sld_hub_inst| ; 122 (33) ; 79 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 43 (26) ; 20 (1) ; 59 (6) ; 5 (0) ; 0 (0) ; |counter|sld_hub:sld_hub_inst ; work ;
; |lpm_decode:instruction_decoder| ; 5 (0) ; 5 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (0) ; 0 (0) ; 0 (0) ; |counter|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder ; work ;
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