top.tan.rpt

来自「实现嵌入式系统的秒表计时」· RPT 代码 · 共 314 行 · 第 1/5 页

; Report IO Paths Separately                            ; Off                ;      ;    ;
; Clock Analysis Only                                   ; Off                ;      ;    ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;
; Cut off read during write signal paths                ; On                 ;      ;    ;
; Cut off clear and preset signal paths                 ; On                 ;      ;    ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;
; Analyze latches as synchronous elements               ; Off                ;      ;    ;
+-------------------------------------------------------+--------------------+------+----+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                                                                   ;
+------------------------------+------------------------------------------+---------------+----------------------------------+---------------------------------------------------+---------------------------------------------------+------------+----------+--------------+
; Type                         ; Slack                                    ; Required Time ; Actual Time                      ; From                                              ; To                                                ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+------------------------------------------+---------------+----------------------------------+---------------------------------------------------+---------------------------------------------------+------------+----------+--------------+
; Worst-case tsu               ; N/A                                      ; None          ; -26.000 ns                       ; over_key                                          ; all_count:u2|bell_count[2]                        ;            ; clk_1M   ; 0            ;
; Worst-case tco               ; N/A                                      ; None          ; 78.000 ns                        ; all_count:u2|hour:u3|hh[0]                        ; am_pm                                             ; clk_1M     ;          ; 0            ;
; Worst-case th                ; N/A                                      ; None          ; 42.000 ns                        ; over_key                                          ; all_count:u2|bell_count[0]                        ;            ; clk_1M   ; 0            ;
; Worst-case Minimum tco       ; N/A                                      ; None          ; 24.000 ns                        ; input:u1|st[1]                                    ; sound_out                                         ; fun_key    ;          ; 0            ;
; Clock Setup: 'clk_1M'        ; N/A                                      ; None          ; 21.28 MHz ( period = 47.000 ns ) ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[1] ; display:u4|count[3]                               ; clk_1M     ; clk_1M   ; 0            ;
; Clock Setup: 'set_key'       ; N/A                                      ; None          ; 47.62 MHz ( period = 21.000 ns ) ; all_count:u2|second:u1|count_temp                 ; all_count:u2|minute:u2|mh[1]                      ; set_key    ; set_key  ; 0            ;
; Clock Setup: 'fun_key'       ; N/A                                      ; None          ; 47.62 MHz ( period = 21.000 ns ) ; all_count:u2|second:u1|count_temp                 ; all_count:u2|minute:u2|mh[1]                      ; fun_key    ; fun_key  ; 0            ;
; Clock Setup: 'bell_key'      ; N/A                                      ; None          ; 76.92 MHz ( period = 13.000 ns ) ; bell:u5|bell_state[0]                             ; bell:u5|bell_state[1]                             ; bell_key   ; bell_key ; 0            ;
; Clock Hold: 'bell_key'       ; Not operational: Clock Skew > Data Delay ; None          ; N/A                              ; bell:u5|bell_state[1]                             ; bell:u5|second:u1|sh[0]                           ; bell_key   ; bell_key ; 60           ;
; Clock Hold: 'fun_key'        ; Not operational: Clock Skew > Data Delay ; None          ; N/A                              ; input:u1|st[0]                                    ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3] ; fun_key    ; fun_key  ; 58           ;
; Total number of failed paths ;                                          ;               ;                                  ;                                                   ;                                                   ;            ;          ; 118          ;
+------------------------------+------------------------------------------+---------------+----------------------------------+---------------------------------------------------+---------------------------------------------------+------------+----------+--------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                               ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; fun_key         ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; bell_key        ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; clk_1M          ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; set_key         ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'fun_key'                                                                                                                                                                                                                                                         ;
+-------+------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period)                           ; From                                                ; To                                                  ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A   ; 47.62 MHz ( period = 21.000 ns )               ; all_count:u2|second:u1|count_temp                   ; all_count:u2|minute:u2|mh[2]                        ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 47.62 MHz ( period = 21.000 ns )               ; all_count:u2|second:u1|count_temp                   ; all_count:u2|minute:u2|mh[1]                        ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|second:u1|count_temp                   ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|minute:u2|count_temp                   ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[0]   ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[2]   ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[1]   ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|hh[1]                          ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|hh[0]                          ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]   ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|second:u1|count_temp                   ; all_count:u2|hour:u3|hh[0]                          ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|minute:u2|count_temp                   ; all_count:u2|hour:u3|hh[0]                          ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[0]   ; all_count:u2|hour:u3|hh[0]                          ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[2]   ; all_count:u2|hour:u3|hh[0]                          ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;
; N/A   ; 71.43 MHz ( period = 14.000 ns )               ; all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[1]   ; all_count:u2|hour:u3|hh[0]                          ; fun_key    ; fun_key  ; None                        ; None                      ; None                    ;