udevios.v

来自「实现USB接口功能的VHDL和verilog完整源代码」· Verilog 代码 · 共 30 行

/* 
This file includes all the io signals for the
module declaration that are specific to endpoints
*/
		currentalternatesetting,
		//endp0noncorecmd,
		endp0rddata,		// for device endpoint 0 commands
		endp0rd,
		endp0rdready,
		endp0rdstall,
		endp0wr,
		endp0wrready,
		endp0wrstall,

	// connections to endpoint1 - read only
		endp1wr,
		endp1wrready,
//		endp1wrstall,

	// connections to endpoint3 - read only
		endp3rd,
		endp3rddata,
		endp3rdready,
//		endp3rdstall,
	// connections to endpoint2 - read only
		endp2rd,
		endp2rddata,
		endp2rdready
//		endp2rdstall