__projnav.log

来自「非常优秀的CPLD源代码」· LOG 代码 · 共 1,813 行 · 第 1/5 页
LOG
1,813 行
Synthesizing Unit <IDE_EXT>.    Related source file is IDE_EXT.v.WARNING:Xst:1306 - Output <IRQ<2:1>> is never assigned.WARNING:Xst:647 - Input <NCS3> is never used.WARNING:Xst:647 - Input <NCS4> is never used.Unit <IDE_EXT> synthesized.=========================================================================*                       Advanced HDL Synthesis                          *=========================================================================Advanced RAM inference ...Advanced multiplier inference ...Advanced Registered AddSub inference ...Dynamic shift register inference ...=========================================================================HDL Synthesis ReportFound no macro==================================================================================================================================================*                         Low Level Synthesis                           *=========================================================================Optimizing unit <IDE_EXT> ...Completed process "Synthesize".
Started process "Translate".Release 6.3i - ngdbuild G.35Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.Command Line: ngdbuild -dd _ngo -i -p xc9500xl IDE_EXT.ngc IDE_EXT.ngd Reading NGO file "e:/at91rm9200调研/pld_src/ide_ext/IDE_EXT.ngc" ...Reading component libraries for design expansion...Checking timing specifications ...Checking expanded design ...NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Total memory usage is 38056 kilobytesWriting NGD file "IDE_EXT.ngd" ...Writing NGDBUILD log file "IDE_EXT.bld"...NGDBUILD done.Completed process "Translate".
Started process "Fit".Release 6.3i - CPLD Optimizer/Partitioner G.35Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.WARNING:Cpld:1007 - Removing unused input(s) 'NCS3'.  The input(s) are unused   after optimization. Please verify functionality via simulation.WARNING:Cpld:1007 - Removing unused input(s) 'NCS4'.  The input(s) are unused   after optimization. Please verify functionality via simulation.Considering device XC9572XL-10-VQ64.Flattening design..Timing optimizationTiming driven global resource optimizationGeneral global resource optimization........Re-checking device resources ...Mapping a total of 12 equations into 4 function blocks..........字符转换错误：“Unconvertible UTF-8 character beginning with 0xb5”（行号可能太小）。line number 1Entity nullFailed to open: IDE_EXT_build.xmlDesign IDE_EXT has been optimized and fit into device XC9572XL-10-VQ64.Completed process "Fit".
Started process "Generate Programming File".Release 6.3i - Programming File Generator G.35Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.Completed process "Generate Programming File".
Started process "Generate HTML report".Release 6.3i - CPLD HTML Report Processor G.35Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.字符转换错误：“Unconvertible UTF-8 character beginning with 0xb5”（行号可能太小）。line number 1Entity nullFailed to open: IDE_EXT_build.xmlERROR:Cpld:1137 - Child process failed -mode 1


Project Navigator Auto-Make Log File-------------------------------------



Started process "Synthesize".=========================================================================*                          HDL Compilation                              *=========================================================================Compiling source file "IDE_EXT.v"ERROR:HDLCompilers:207 - IDE_EXT.v line 9 Signal 'IRQ' is not referenced in the module port listERROR:HDLCompilers:28 - IDE_EXT.v line 30 'SIDE_IORDY' has not been declaredERROR:HDLCompilers:28 - IDE_EXT.v line 40 'SIDE_INT' has not been declaredERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA2' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA3' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA4' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PC6' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_INT' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_IOW' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA23' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA19' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA25' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA26' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA29' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_DA' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_CS0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_CS1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_IORDY' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_RST' was not declared as input, inout or outputModule <IDE_EXT> compiledAnalysis of file <IDE_EXT.prj> failed.--> Total memory usage is 48404 kilobytesERROR: XST failedProcess "Synthesize" did not complete.
Project Navigator Auto-Make Log File-------------------------------------



Started process "Synthesize".=========================================================================*                          HDL Compilation                              *=========================================================================Compiling source file "IDE_EXT.v"ERROR:HDLCompilers:207 - IDE_EXT.v line 9 Signal 'IRQ0' is not referenced in the module port listERROR:HDLCompilers:207 - IDE_EXT.v line 9 Signal 'IRQ3' is not referenced in the module port listERROR:HDLCompilers:28 - IDE_EXT.v line 30 'SIDE_IORDY' has not been declaredERROR:HDLCompilers:28 - IDE_EXT.v line 40 'SIDE_INT' has not been declaredERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA2' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA3' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA4' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PC6' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_INT' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_IOW' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA23' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA19' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA25' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA26' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA29' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_DA' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_CS0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_CS1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_IORDY' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_RST' was not declared as input, inout or outputModule <IDE_EXT> compiledAnalysis of file <IDE_EXT.prj> failed.--> Total memory usage is 48404 kilobytesERROR: XST failedProcess "Synthesize" did not complete.
Project Navigator Auto-Make Log File-------------------------------------



Started process "Synthesize".=========================================================================*                          HDL Compilation                              *=========================================================================Compiling source file "IDE_EXT.v"ERROR:HDLCompilers:28 - IDE_EXT.v line 30 'SIDE_IORDY' has not been declaredERROR:HDLCompilers:28 - IDE_EXT.v line 40 'SIDE_INT' has not been declaredERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA2' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA3' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA4' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PC6' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_INT' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_IOW' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA23' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA19' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA25' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA26' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA29' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_DA' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_CS0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_CS1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_IORDY' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 4 Port reference 'SIDE_RST' was not declared as input, inout or outputModule <IDE_EXT> compiledAnalysis of file <IDE_EXT.prj> failed.--> Total memory usage is 48404 kilobytesERROR: XST failedProcess "Synthesize" did not complete.
Project Navigator Auto-Make Log File-------------------------------------



Started process "Synthesize".=========================================================================*                          HDL Compilation                              *=========================================================================Compiling source file "IDE_EXT.v"ERROR:HDLCompilers:207 - IDE_EXT.v line 16 Signal 'SIDE_IOR' is not referenced in the module port listERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA2' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA3' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA4' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PC6' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA23' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA19' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA25' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA26' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA29' was not declared as input, inout or outputModule <IDE_EXT> compiledAnalysis of file <IDE_EXT.prj> failed.--> Total memory usage is 48404 kilobytesERROR: XST failedProcess "Synthesize" did not complete.
Project Navigator Auto-Make Log File-------------------------------------



Started process "Synthesize".=========================================================================*                          HDL Compilation                              *=========================================================================Compiling source file "IDE_EXT.v"ERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA0' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA1' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA2' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA3' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA4' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PC6' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA23' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA19' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA25' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA26' was not declared as input, inout or outputERROR:HDLCompilers:208 - IDE_EXT.v line 2 Port reference 'PA29' was not declared as input, inout or outputModule <IDE_EXT> compiledAnalysis of file <IDE_EXT.prj> failed.--> Total memory usage is 48404 kilobytesERROR: XST failedProcess "Synthesize" did not complete.
Project Navigator Auto-Make Log File-------------------------------------



Started process "Synthesize".=========================================================================*                          HDL Compilation                              *=========================================================================Compiling source file "IDE_EXT.v"Module <IDE_EXT> compiledNo errors in compilationAnalysis of file <IDE_EXT.prj> succeeded. =========================================================================*                            HDL Analysis                               *=========================================================================Analyzing top module <IDE_EXT>.Module <IDE_EXT> is correct for synthesis.     Set property "resynthesize = true" for unit <IDE_EXT>.=========================================================================*                           HDL Synthesis                               *=========================================================================Synthesizing Unit <IDE_EXT>.    Related source file is IDE_EXT.v.WARNING:Xst:1306 - Output <SPCK> is never assigned.WARNING:Xst:1306 - Output <TIOA1> is never assigned.WARNING:Xst:1306 - Output <NPCS0> is never assigned.WARNING:Xst:1306 - Output <TWD> is never assigned.WARNING:Xst:647 - Input <NCS4> is never used.WARNING:Xst:1306 - Output <MOSI> is never assigned.WARNING:Xst:1306 - Output <PCK1> is never assigned.WARNING:Xst:1306 - Output <TWCK> is never assigned.WARNING:Xst:1306 - Output <MISO> is never assigned.Unit <IDE_EXT> synthesized.=========================================================================*                       Advanced HDL Synthesis                          *=========================================================================Advanced RAM inference ...Advanced multiplier inference ...Advanced Registered AddSub inference ...
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