adder8.tan.qmsg

来自「通过VHDL实现4位全加器」· QMSG 代码 · 共 6 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Web Edition " "Info: Version 7.2 Build 151 09/26/2007 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 27 22:35:41 2008 " "Info: Processing started: Thu Nov 27 22:35:41 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off adder8 -c adder8 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off adder8 -c adder8 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "b\[2\] sum\[6\] 8.370 ns Longest " "Info: Longest tpd from source pin \"b\[2\]\" to destination pin \"sum\[6\]\" is 8.370 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.810 ns) 0.810 ns b\[2\] 1 PIN PIN_U18 3 " "Info: 1: + IC(0.000 ns) + CELL(0.810 ns) = 0.810 ns; Loc. = PIN_U18; Fanout = 3; PIN Node = 'b\[2\]'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[2] } "NODE_NAME" } } { "adder8.vhd" "" { Text "F:/Engineering Document/Quartus7.2/adder8/adder8.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.903 ns) + CELL(0.516 ns) 5.229 ns _~10 2 COMB LCCOMB_X1_Y3_N4 2 " "Info: 2: + IC(3.903 ns) + CELL(0.516 ns) = 5.229 ns; Loc. = LCCOMB_X1_Y3_N4; Fanout = 2; COMB Node = '_~10'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.419 ns" { b[2] _~10 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.035 ns) 5.264 ns _~14 3 COMB LCCOMB_X1_Y3_N6 2 " "Info: 3: + IC(0.000 ns) + CELL(0.035 ns) = 5.264 ns; Loc. = LCCOMB_X1_Y3_N6; Fanout = 2; COMB Node = '_~14'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.035 ns" { _~10 _~14 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.035 ns) 5.299 ns _~18 4 COMB LCCOMB_X1_Y3_N8 2 " "Info: 4: + IC(0.000 ns) + CELL(0.035 ns) = 5.299 ns; Loc. = LCCOMB_X1_Y3_N8; Fanout = 2; COMB Node = '_~18'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.035 ns" { _~14 _~18 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.035 ns) 5.334 ns _~22 5 COMB LCCOMB_X1_Y3_N10 2 " "Info: 5: + IC(0.000 ns) + CELL(0.035 ns) = 5.334 ns; Loc. = LCCOMB_X1_Y3_N10; Fanout = 2; COMB Node = '_~22'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.035 ns" { _~18 _~22 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.125 ns) 5.459 ns _~25 6 COMB LCCOMB_X1_Y3_N12 1 " "Info: 6: + IC(0.000 ns) + CELL(0.125 ns) = 5.459 ns; Loc. = LCCOMB_X1_Y3_N12; Fanout = 1; COMB Node = '_~25'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.125 ns" { _~22 _~25 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.777 ns) + CELL(2.134 ns) 8.370 ns sum\[6\] 7 PIN PIN_T19 0 " "Info: 7: + IC(0.777 ns) + CELL(2.134 ns) = 8.370 ns; Loc. = PIN_T19; Fanout = 0; PIN Node = 'sum\[6\]'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.911 ns" { _~25 sum[6] } "NODE_NAME" } } { "adder8.vhd" "" { Text "F:/Engineering Document/Quartus7.2/adder8/adder8.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.690 ns ( 44.09 % ) " "Info: Total cell delay = 3.690 ns ( 44.09 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.680 ns ( 55.91 % ) " "Info: Total interconnect delay = 4.680 ns ( 55.91 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "8.370 ns" { b[2] _~10 _~14 _~18 _~22 _~25 sum[6] } "NODE_NAME" } } { "f:/program/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/program/altera/72/quartus/bin/Technology_Viewer.qrui" "8.370 ns" { b[2] {} b[2]~combout {} _~10 {} _~14 {} _~18 {} _~22 {} _~25 {} sum[6] {} } { 0.000ns 0.000ns 3.903ns 0.000ns 0.000ns 0.000ns 0.000ns 0.777ns } { 0.000ns 0.810ns 0.516ns 0.035ns 0.035ns 0.035ns 0.125ns 2.134ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "133 " "Info: Allocated 133 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Nov 27 22:35:42 2008 " "Info: Processing ended: Thu Nov 27 22:35:42 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}