prev_cmp_adder4.qmsg

来自「通过VHDL实现4位全加器」· QMSG 代码 · 共 58 行 · 第 1/3 页

{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "5 " "Warning: Found 5 output pins without output pin load capacitance assignment" { { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum\[0\] 0 " "Info: Pin \"sum\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum\[1\] 0 " "Info: Pin \"sum\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum\[2\] 0 " "Info: Pin \"sum\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum\[3\] 0 " "Info: Pin \"sum\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "cout 0 " "Info: Pin \"cout\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0}  } {  } 0 0 "Found %1!d! output pins without output pin load capacitance assignment" 0 0 "" 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 0 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "" 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "F:/Engineering Document/Quartus7.2/adder4/adder4.fit.smsg " "Info: Generated suppressed messages file F:/Engineering Document/Quartus7.2/adder4/adder4.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 5 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "206 " "Info: Allocated 206 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat Nov 15 23:21:33 2008 " "Info: Processing ended: Sat Nov 15 23:21:33 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:08 " "Info: Elapsed time: 00:00:08" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Web Edition " "Info: Version 7.2 Build 151 09/26/2007 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Nov 15 23:21:36 2008 " "Info: Processing started: Sat Nov 15 23:21:36 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off adder4 -c adder4 " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off adder4 -c adder4" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" {  } {  } 0 0 "Writing out detailed assembly data for power analysis" 0 0 "" 0}
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" {  } {  } 0 0 "Assembler is generating device programming files" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "182 " "Info: Allocated 182 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat Nov 15 23:21:42 2008 " "Info: Processing ended: Sat Nov 15 23:21:42 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Web Edition " "Info: Version 7.2 Build 151 09/26/2007 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Nov 15 23:21:43 2008 " "Info: Processing started: Sat Nov 15 23:21:43 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off adder4 -c adder4 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off adder4 -c adder4 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "a\[3\] cout 10.261 ns Longest " "Info: Longest tpd from source pin \"a\[3\]\" to destination pin \"cout\" is 10.261 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.840 ns) 0.840 ns a\[3\] 1 PIN PIN_Y21 3 " "Info: 1: + IC(0.000 ns) + CELL(0.840 ns) = 0.840 ns; Loc. = PIN_Y21; Fanout = 3; PIN Node = 'a\[3\]'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { a[3] } "NODE_NAME" } } { "adder4.vhd" "" { Text "F:/Engineering Document/Quartus7.2/adder4/adder4.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(4.129 ns) + CELL(0.378 ns) 5.347 ns _~15 2 COMB LCCOMB_X25_Y1_N22 1 " "Info: 2: + IC(4.129 ns) + CELL(0.378 ns) = 5.347 ns; Loc. = LCCOMB_X25_Y1_N22; Fanout = 1; COMB Node = '_~15'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.507 ns" { a[3] _~15 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.312 ns) 5.659 ns _~17 3 COMB LCCOMB_X25_Y1_N24 1 " "Info: 3: + IC(0.000 ns) + CELL(0.312 ns) = 5.659 ns; Loc. = LCCOMB_X25_Y1_N24; Fanout = 1; COMB Node = '_~17'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.312 ns" { _~15 _~17 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.556 ns) + CELL(2.046 ns) 10.261 ns cout 4 PIN PIN_B10 0 " "Info: 4: + IC(2.556 ns) + CELL(2.046 ns) = 10.261 ns; Loc. = PIN_B10; Fanout = 0; PIN Node = 'cout'" {  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.602 ns" { _~17 cout } "NODE_NAME" } } { "adder4.vhd" "" { Text "F:/Engineering Document/Quartus7.2/adder4/adder4.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.576 ns ( 34.85 % ) " "Info: Total cell delay = 3.576 ns ( 34.85 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.685 ns ( 65.15 % ) " "Info: Total interconnect delay = 6.685 ns ( 65.15 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/program/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "10.261 ns" { a[3] _~15 _~17 cout } "NODE_NAME" } } { "f:/program/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/program/altera/72/quartus/bin/Technology_Viewer.qrui" "10.261 ns" { a[3] {} a[3]~combout {} _~15 {} _~17 {} cout {} } { 0.000ns 0.000ns 4.129ns 0.000ns 2.556ns } { 0.000ns 0.840ns 0.378ns 0.312ns 2.046ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "133 " "Info: Allocated 133 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat Nov 15 23:21:44 2008 " "Info: Processing ended: Sat Nov 15 23:21:44 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 5 s " "Info: Quartus II Full Compilation was successful. 0 errors, 5 warnings" {  } {  } 0 0 "Quartus II %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}