reg8.qws

来自「通过VHDL实现4位全加器」· QWS 代码 · 共 42 行

[ProjectWorkspace]
ptn_Child1=Frames
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
ptn_Child2=Document-1
ptn_Child3=Document-2
ptn_Child4=Document-3
[ProjectWorkspace.Frames.ChildFrames.Document-0]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0]
DocPathName=reg8.vhd
DocumentCLSID={ca385d57-a4c7-11d1-a098-0020affa43f2}
IsChildFrameDetached=False
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0.StateMap]
AFC_IN_REPORT=False
[ProjectWorkspace.Frames.ChildFrames.Document-2]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-2.ViewFrame-0]
DocPathName=../../../program/altera/72/quartus/bin/Technology_Viewer.qrui
DocumentCLSID={1ffdd55b-8a91-4747-b09f-0e898c479bed}
IsChildFrameDetached=False
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-2.ViewFrame-0.StateMap]
AFC_CMP_AP_NAME=reg8
AFC_PROJ_DB_PATH=F:/Engineering Document/Quartus7.2/register8/db/reg8.quartus_db
[ProjectWorkspace.Frames.ChildFrames.Document-3]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-3.ViewFrame-0]
DocPathName=../../../program/altera/72/quartus/bin/Technology_Viewer_Post_Map.qrui
DocumentCLSID={83708a55-a6bf-42c2-a7d6-2c58f5a106bb}
IsChildFrameDetached=False
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-3.ViewFrame-0.StateMap]
AFC_CMP_AP_NAME=reg8
AFC_PROJ_DB_PATH=F:/Engineering Document/Quartus7.2/register8/db/reg8.quartus_db