paobiao.tan.summary

该文档是基于QUARTUS2_6.0的Verilog试验例程

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 1.378 ns
From           : pause
To             : second:inst2|sl[3]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 21.926 ns
From           : minute:inst|msl[0]
To             : q_out[0]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.721 ns
From           : clr
To             : second:inst2|sl[0]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 175.07 MHz ( period = 5.712 ns )
From           : second:inst2|rr[2]
To             : second:inst2|clk_1
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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