plvji.fit.summary

该文档是基于QUARTUS2_6.0的Verilog试验例程

Fitter Status : Successful - Sun Dec 02 15:02:45 2007
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : plvji
Top-level Entity Name : plvji
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Total logic elements : 233 / 2,910 ( 8 % )
Total pins : 17 / 104 ( 16 % )
Total virtual pins : 0
Total memory bits : 0 / 59,904 ( 0 % )
Total PLLs : 0 / 1 ( 0 % )