alarm_clock.fnsim.qmsg

本文件是针对了解闹钟控制系统而写的一个VHDL源代码。

{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[0\]\[3\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[0\]\[3\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[0\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[1\]\[0\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[1\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[1\]\[1\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[2\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[1\]\[2\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[3\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[1\]\[3\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[0\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[2\]\[0\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[1\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[2\]\[1\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[2\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[2\]\[2\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[3\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[2\]\[3\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[0\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[3\]\[0\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[1\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[3\]\[1\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[2\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[3\]\[2\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[3\] display_driver.vhd(16) " "Info (10041): Verilog HDL or VHDL info at display_driver.vhd(16): inferred latch for \"DISPLAY_TIME\[3\]\[3\]\"" {  } { { "display_driver.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/display_driver.vhd" 16 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY_WITH_ARCHITECTURE" "FQ_DIVIDER FQ_DIVIDER:U7 A:art " "Info: Elaborating entity \"FQ_DIVIDER\" using architecture \"A:art\" for hierarchy \"FQ_DIVIDER:U7\"" {  } { { "alarm_clock.vhd" "U7" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/alarm_clock.vhd" 88 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" using architecture \"%3!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus/libraries/megafunctions/lpm_add_sub.tdf" 100 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "FQ_DIVIDER:U7\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\"" {  } { { "fq_divider.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/fq_divider.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "addcore.tdf" "" { Text "d:/quartus/libraries/megafunctions/addcore.tdf" 73 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "FQ_DIVIDER:U7\|lpm_add_sub:Add0\|addcore:adder FQ_DIVIDER:U7\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "fq_divider.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/fq_divider.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "FQ_DIVIDER:U7\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Info: Parameter \"LPM_WIDTH\" = \"16\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "fq_divider.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/fq_divider.vhd" 25 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "a_csnbuffer.tdf" "" { Text "d:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "FQ_DIVIDER:U7\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node FQ_DIVIDER:U7\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/quartus/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "fq_divider.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/fq_divider.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "FQ_DIVIDER:U7\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Info: Parameter \"LPM_WIDTH\" = \"16\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "fq_divider.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/fq_divider.vhd" 25 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "FQ_DIVIDER:U7\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node FQ_DIVIDER:U7\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/quartus/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "fq_divider.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/fq_divider.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "FQ_DIVIDER:U7\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"FQ_DIVIDER:U7\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Info: Parameter \"LPM_WIDTH\" = \"16\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "fq_divider.vhd" "" { Text "C:/Documents and Settings/yujiangwang/桌面/12月任务/闹钟控制系统/fq_divider.vhd" 25 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "d:/quartus/libraries/megafunctions/altshift.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}