alarm_controller.vhd

本文件是针对了解闹钟控制系统而写的一个VHDL源代码。

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE WORK.P_ALARM.ALL;
ENTITY ALARM_CONTROLLER IS
   PORT(KEY: IN STD_LOGIC;
        ALARM_BUTTON: IN STD_LOGIC;
        TIME_BUTTON: IN STD_LOGIC;
        CLK: IN STD_LOGIC;
        RESET: IN STD_LOGIC;
        LOAD_NEW_A: OUT STD_LOGIC;   
        LOAD_NEW_C:OUT STD_LOGIC;
        SHOW_NEW_TIME: OUT STD_LOGIC;
        SHOW_A: OUT STD_LOGIC);
END ENTITY ALARM_CONTROLLER;
ARCHITECTURE ART OF ALARM_CONTROLLER IS
  TYPE T_STATE IS(S0,S1,S2,S3,S4);
  CONSTANT KEY_TIMEOUT:T_SHORT:=500;
  CONSTANT SHOW_ALARM_TIMEOUT:T_SHORT:=500;
  SIGNAL CURR_STATE: T_STATE;
  SIGNAL NEXT_STATE:T_STATE;
  SIGNAL COUNTER_K:T_SHORT;
  SIGNAL ENABLE_COUNT_K: STD_LOGIC;
  SIGNAL COUNT_K_END: STD_LOGIC;
  SIGNAL COUNTER_A:T_SHORT;
  SIGNAL ENABLE_COUNT_A:STD_LOGIC;
  SIGNAL COUNT_A_END: STD_LOGIC;
  BEGIN
  PROCESS(CLK,RESET) IS
    BEGIN
    IF RESET ='1' THEN
        CURR_STATE<=S0;
    ELSIF RISING_EDGE(CLK) THEN
       CURR_STATE<=NEXT_STATE;
    END IF;
 END PROCESS;
PROCESS(KEY,ALARM_BUTTON,TIME_BUTTON,CURR_STATE,
        COUNT_A_END,COUNT_K_END) IS
    BEGIN
      NEXT_STATE<=CURR_STATE;
      LOAD_NEW_A<='0';
      LOAD_NEW_C<='0';
      SHOW_A<='0';
      SHOW_NEW_TIME<='0';
      ENABLE_COUNT_K<='0';
      ENABLE_COUNT_A<='0';
 
     CASE CURR_STATE IS
     WHEN S0=>
       IF(KEY='1') THEN
          NEXT_STATE<=S1;
          SHOW_NEW_TIME<='1';
       ELSIF(ALARM_BUTTON='1') THEN
         NEXT_STATE<=S4;
         SHOW_A<='1';
       ELSE
         NEXT_STATE<=S0;
       END IF;
    WHEN S1=>
       IF(KEY='1') THEN
          NEXT_STATE<=S1;
          SHOW_NEW_TIME<='1';
       ELSIF(ALARM_BUTTON='1') THEN
         NEXT_STATE<=S2;
         LOAD_NEW_A<='1';
       ELSIF(TIME_BUTTON='1') THEN 
          NEXT_STATE<=S3;
          LOAD_NEW_C<='1';
       ELSE
         IF(COUNT_K_END='1') THEN
          NEXT_STATE<=S0;
       ELSE
         NEXT_STATE<=S1;
       END IF;
       ENABLE_COUNT_K<='1';
       END IF;
         SHOW_NEW_TIME<='1';
   WHEN S2=>
       IF(ALARM_BUTTON='1') THEN
          NEXT_STATE<=S2;
          LOAD_NEW_A<='1';
       ELSE
         NEXT_STATE<=S0;
       END IF;
   WHEN S3=>
       IF(TIME_BUTTON='1') THEN
          NEXT_STATE<=S3;
          LOAD_NEW_C<='1';
       ELSE
         NEXT_STATE<=S0;
       END IF;

   WHEN S4=>
       IF(KEY='1') THEN
          NEXT_STATE<=S1;
          ELSE
            NEXT_STATE<=S4;
            IF(COUNT_A_END='1') THEN
               NEXT_STATE<=S0;
         NEXT_STATE<=S4;
         SHOW_A<='1';
         END IF;
         ENABLE_COUNT_A<='1';
         END IF;
       WHEN OTHERS=>
           NULL;
       END CASE;
 END PROCESS;

COUNT_KEY :PROCESS(ENABLE_COUNT_K,CLK) IS
BEGIN
  IF(ENABLE_COUNT_K='0') THEN
     COUNTER_K<=0;
     COUNT_K_END<='0';
 ELSIF(RISING_EDGE(CLK)) THEN
    IF(COUNTER_K>=KEY_TIMEOUT) THEN
       COUNT_K_END<='1';
    ELSE
       COUNTER_K<=COUNTER_K+1;
    END IF;
 END IF;
END PROCESS COUNT_KEY;

 COUNT_ALARM: PROCESS(ENABLE_COUNT_A,CLK) IS
 BEGIN
   IF(ENABLE_COUNT_A='0')THEN
     COUNTER_A<=0;
     COUNT_A_END<='0';
  ELSIF RISING_EDGE(CLK) THEN
    IF(COUNTER_A>=SHOW_ALARM_TIMEOUT) THEN
      COUNT_A_END<='1';
  ELSE
    COUNTER_A<=COUNTER_A+1;
  END IF;
 END IF;
END PROCESS COUNT_ALARM;
END ARCHITECTURE ART;