alarm_clock.vhd

本文件是针对了解闹钟控制系统而写的一个VHDL源代码。

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE WORK.P_ALARM.ALL;
ENTITY ALARM_CLOCK IS
   PORT(KEYPAD :IN  STD_LOGIC_VECTOR(9 DOWNTO 0);
	KEY_DOWN :IN  STD_LOGIC;
    	ALARM_BUTTON:IN  STD_LOGIC;
    	TIME_BUTTON :IN  STD_LOGIC;
    	CLK  :IN  STD_LOGIC;
    	RESET :IN  STD_LOGIC;
    	DISPLAY :OUT T_DISPLAY;
    	SOUND_ALARM :OUT STD_LOGIC);
END ENTITY ALARM_CLOCK;
ARCHITECTURE ART OF ALARM_CLOCK IS
   
COMPONENT DECODER IS --待调用元件端口定义
   PORT(KEYPAD:IN STD_LOGIC_VECTOR(9 DOWNTO 0);
         VALUE :OUT T_DIGITAL);
   END COMPONENT DECODER;
  COMPONENT KEY_BUFFER  IS     --待调用元件端口定义
     PORT(KEY:IN  T_DIGITAL;
        CLK :IN  STD_LOGIC;
        RESET :IN  STD_LOGIC;
        NEW_TIME:OUT T_CLOCK_TIME);
    END COMPONENT KEY_BUFFER;
  COMPONENT ALARM_COUNTER IS  --待调用元件端口定义 
  PORT(NEW_CURRENT_TIME:IN  T_CLOCK_TIME;
        LOAD_NEW_C      :IN  STD_LOGIC;
    CLK             :IN  STD_LOGIC;
    RESET           :IN  STD_LOGIC;
    CURRENT_TIME    :OUT T_CLOCK_TIME);
END COMPONENT ALARM_COUNTER;
  COMPONENT ALARM_REG IS  --待调用元件端口定义
      PORT(NEW_ALARM_TIME:IN  T_CLOCK_TIME;
         LOAD_NEW_A :IN  STD_LOGIC;
         CLK :IN  STD_LOGIC;
RESET :IN  STD_LOGIC;
      ALARM_TIME    :OUT T_CLOCK_TIME);
END COMPONENT ALARM_REG;
  COMPONENT ALARM_CONTROLLER IS --待调用元件端口定义
      PORT(KEY: IN STD_LOGIC;
        ALARM_BUTTON: IN STD_LOGIC;
        TIME_BUTTON: IN STD_LOGIC;
        CLK: IN STD_LOGIC;
        RESET: IN STD_LOGIC;
        LOAD_NEW_A: OUT STD_LOGIC;   
        LOAD_NEW_C:OUT STD_LOGIC;
        SHOW_NEW_TIME: OUT STD_LOGIC;
        SHOW_A: OUT STD_LOGIC);
END COMPONENT ALARM_CONTROLLER;
COMPONENT DISPLAY_DRIVER IS  --待调用元件端口定义
      PORT(ALARM_TIME :IN  T_CLOCK_TIME;
     CURRENT_TIME :IN  T_CLOCK_TIME;
     NEW_TIME :IN  T_CLOCK_TIME;
     SHOW_NEW_TIME:IN  STD_LOGIC;
     SHOW_A :IN  STD_LOGIC;
     SOUND_ALARM :OUT STD_LOGIC;
     DISPLAY:OUT T_DISPLAY);
END COMPONENT DISPLAY_DRIVER;
    COMPONENT FQ_DIVIDER IS --待调用元件端口定义
      PORT( CLK_IN      :IN  STD_LOGIC;
      RESET       :IN  STD_LOGIC;
      CLK_OUT     :OUT STD_LOGIC );
END COMPONENT FQ_DIVIDER;       
    SIGNAL INNER_KEY  : T_DIGITAL;
    SIGNAL INNER_TIME : T_CLOCK_TIME;
    SIGNAL INNER_TIME_C : T_CLOCK_TIME;
    SIGNAL INNER_TIME_A : T_CLOCK_TIME;
    SIGNAL INNER_L_C : STD_LOGIC;
    SIGNAL INNER_L_A : STD_LOGIC;
    SIGNAL INNER_S_A : STD_LOGIC;
    SIGNAL INNER_S_N : STD_LOGIC;
    SIGNAL INNER_SEC_CLK : STD_LOGIC;
FOR ALL: DECODER USE ENTITY WORK.DECODER(ART);
FOR ALL: KEY_BUFFER USE ENTITY WORK.KEY_BUFFER(ART);
FOR ALL: ALARM_COUNTER USE ENTITY WORK.ALARM_COUNTER(ART);
FOR ALL: ALARM_REG USE ENTITY WORK.ALARM_REG(ART);
FOR ALL: ALARM_CONTROLLER USE ENTITY WORK.ALARM_CONTROLLER(ART);
FOR ALL: DISPLAY_DRIVER USE ENTITY WORK.DISPLAY_DRIVER(ART);
FOR ALL: FQ_DIVIDER USE ENTITY WORK.FQ_DIVIDER(ART);
BEGIN
   U1: DECODER PORT MAP(KEYPAD,INNER_KEY);
   U2: KEY_BUFFER PORT MAP(INNER_KEY, KEY_DOWN, RESET, INNER_TIME);
   U3: ALARM_CONTROLLER PORT MAP(KEY_DOWN,ALARM_BUTTON,TIME_BUTTON,CLK,RESET, INNER_L_A,INNER_L_C, INNER_S_N,  INNER_S_A );
   U4: ALARM_COUNTER PORT MAP( INNER_TIME, INNER_L_C, INNER_SEC_CLK,RESET, INNER_TIME_C);
   U5: ALARM_REG PORT MAP(INNER_TIME,INNER_L_A,CLK,RESET,INNER_TIME_A);
   U6: DISPLAY_DRIVER PORT MAP( INNER_TIME_A,INNER_TIME_C,INNER_TIME,INNER_S_N, INNER_S_A, SOUND_ALARM,DISPLAY);
   U7: FQ_DIVIDER PORT MAP(CLK,RESET,INNER_SEC_CLK);
END ARCHITECTURE ART;