rl_shift.sim.rpt

带有同步预置的加载左右移位寄存器VHDL源代码

The following table displays output ports that toggle between 1 and 0 during simulation.
+-----------------------------------------------------+
; Complete 1/0-Value Coverage                         ;
+---------------+------------------+------------------+
; Node Name     ; Output Port Name ; Output Port Type ;
+---------------+------------------+------------------+
; |RL_SHIFT|CLK ; |RL_SHIFT|CLK    ; out              ;
+---------------+------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                           ;
+----------------------------------------------------------------+----------------------------------------------------------------+------------------+
; Node Name                                                      ; Output Port Name                                               ; Output Port Type ;
+----------------------------------------------------------------+----------------------------------------------------------------+------------------+
; |RL_SHIFT|TEMP~0                                               ; |RL_SHIFT|TEMP~0                                               ; out              ;
; |RL_SHIFT|RESET                                                ; |RL_SHIFT|RESET                                                ; out              ;
; |RL_SHIFT|MODE[0]                                              ; |RL_SHIFT|MODE[0]                                              ; out              ;
; |RL_SHIFT|MODE[1]                                              ; |RL_SHIFT|MODE[1]                                              ; out              ;
; |RL_SHIFT|DATAIN[0]                                            ; |RL_SHIFT|DATAIN[0]                                            ; out              ;
; |RL_SHIFT|DATAIN[1]                                            ; |RL_SHIFT|DATAIN[1]                                            ; out              ;
; |RL_SHIFT|DATAIN[2]                                            ; |RL_SHIFT|DATAIN[2]                                            ; out              ;
; |RL_SHIFT|DATAIN[3]                                            ; |RL_SHIFT|DATAIN[3]                                            ; out              ;
; |RL_SHIFT|DATAIN[4]                                            ; |RL_SHIFT|DATAIN[4]                                            ; out              ;
; |RL_SHIFT|DATAIN[5]                                            ; |RL_SHIFT|DATAIN[5]                                            ; out              ;
; |RL_SHIFT|DATAIN[6]                                            ; |RL_SHIFT|DATAIN[6]                                            ; out              ;
; |RL_SHIFT|DATAIN[7]                                            ; |RL_SHIFT|DATAIN[7]                                            ; out              ;
; |RL_SHIFT|RIGHT                                                ; |RL_SHIFT|RIGHT                                                ; out              ;
; |RL_SHIFT|LEFT                                                 ; |RL_SHIFT|LEFT                                                 ; out              ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux7|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux6|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~1    ; out0             ;