clk_div.fit

这是我在ISP编程实验中独立编写的一个采用行为描述方式实现的分频器

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 12/18/2008 20:08:17      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "clk_div"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 1      ;
    "clk_div16"                    : OUTPUT_PIN = 17     ;
    ":2"                           : LOCATION   = LC2_A10;
    ":4"                           : LOCATION   = LC1_A10;  -- count3
    ":5"                           : LOCATION   = LC3_A10;  -- count2
    ":6"                           : LOCATION   = LC4_A10;  -- count1
    ":7"                           : LOCATION   = LC5_A10;  -- count0

END;

INTERNAL_INFO "clk_div"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC2_A10,->LC1_A10,->LC3_A10,->LC4_A10,->LC5_A10|";
    LC2_A10 : LORAX = "1:MSW2R0C8,HHL1R0->OH10R0P17|";
	LC2_A10 : LORAX2 = "LC1_A10, LC3_A10, LC5_A10, LC4_A10";
	LC1_A10 : LORAX2 = "LC3_A10, LC1_A10, LC5_A10, LC4_A10";
	LC3_A10 : LORAX2 = "LC1_A10, LC3_A10, LC5_A10, LC4_A10";
	LC4_A10 : LORAX2 = "X, X, LC4_A10, LC5_A10";
	LC5_A10 : LORAX2 = "X, X, X, LC5_A10";
END;