_primary.vhd

来自「OFDM系统中FFT的Verilog HDL 语言实现。」· VHDL 代码 · 共 12 行

library verilog;
use verilog.vl_types.all;
entity mul is
    port(
        clk             : in     vl_logic;
        a               : in     vl_logic_vector(31 downto 0);
        b               : in     vl_logic_vector(15 downto 0);
        q               : out    vl_logic_vector(31 downto 0);
        ce              : in     vl_logic
    );
end mul;