clock.tan.summary

原创：基于VHDL语言编写的电子钟。采用模块化编写

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 19.832 ns
From           : disp:inst2|disp[3]
To             : disp[4]
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 57.63 MHz ( period = 17.353 ns )
From           : counter24:inst4|h[1]
To             : disp:inst2|disp[1]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'KEY_MODE'
Slack          : N/A
Required Time  : None
Actual Time    : 61.74 MHz ( period = 16.197 ns )
From           : counter24:inst4|l[1]
To             : counter24:inst4|l[2]
From Clock     : KEY_MODE
To Clock       : KEY_MODE
Failed Paths   : 0

Type           : Clock Setup: 'KEY_CHANGE'
Slack          : N/A
Required Time  : None
Actual Time    : 62.55 MHz ( period = 15.987 ns )
From           : counter24:inst4|l[1]
To             : counter24:inst4|l[2]
From Clock     : KEY_CHANGE
To Clock       : KEY_CHANGE
Failed Paths   : 0

Type           : Clock Hold: 'KEY_MODE'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : counter24:inst4|l[2]
To             : counter24:inst4|l[2]
From Clock     : KEY_MODE
To Clock       : KEY_MODE
Failed Paths   : 89

Type           : Clock Hold: 'KEY_CHANGE'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : counter24:inst4|l[2]
To             : counter24:inst4|l[2]
From Clock     : KEY_CHANGE
To Clock       : KEY_CHANGE
Failed Paths   : 89

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 178

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