clock.fit.summary

原创：基于VHDL语言编写的电子钟。采用模块化编写

Fitter Status : Successful - Tue Nov 11 22:55:47 2008
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : clock
Top-level Entity Name : clock
Family : Cyclone II
Device : EP2C35F484C8
Timing Models : Preliminary
Total logic elements : 134 / 33,216 ( < 1 % )
Total registers : 63
Total pins : 18 / 322 ( 6 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )