clock.map.eqn

原创：基于VHDL语言编写的电子钟。采用模块化编写

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--C1_dp is disp:inst2|dp
C1_dp = DFFEAS(C1L14, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_disp[0] is disp:inst2|disp[0]
C1_disp[0] = DFFEAS(C1L18, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_disp[1] is disp:inst2|disp[1]
C1_disp[1] = DFFEAS(C1L22, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_disp[2] is disp:inst2|disp[2]
C1_disp[2] = DFFEAS(C1L26, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_disp[3] is disp:inst2|disp[3]
C1_disp[3] = DFFEAS(C1L30, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--E1L7 is bcd_decoder:inst5|LED7S[6]~191
E1L7 = C1_disp[0] & (C1_disp[3] # C1_disp[1] $ C1_disp[2]) # !C1_disp[0] & (C1_disp[1] # C1_disp[2] $ C1_disp[3]);


--E1L6 is bcd_decoder:inst5|LED7S[5]~192
E1L6 = C1_disp[0] & (C1_disp[3] $ (C1_disp[1] # !C1_disp[2])) # !C1_disp[0] & C1_disp[1] & !C1_disp[2] & !C1_disp[3];


--E1L5 is bcd_decoder:inst5|LED7S[4]~193
E1L5 = C1_disp[1] & C1_disp[0] & (!C1_disp[3]) # !C1_disp[1] & (C1_disp[2] & (!C1_disp[3]) # !C1_disp[2] & C1_disp[0]);


--E1L4 is bcd_decoder:inst5|LED7S[3]~194
E1L4 = C1_disp[1] & (C1_disp[0] & C1_disp[2] # !C1_disp[0] & !C1_disp[2] & C1_disp[3]) # !C1_disp[1] & !C1_disp[3] & (C1_disp[0] $ C1_disp[2]);


--E1L3 is bcd_decoder:inst5|LED7S[2]~195
E1L3 = C1_disp[2] & C1_disp[3] & (C1_disp[1] # !C1_disp[0]) # !C1_disp[2] & !C1_disp[0] & C1_disp[1] & !C1_disp[3];


--E1L2 is bcd_decoder:inst5|LED7S[1]~196
E1L2 = C1_disp[1] & (C1_disp[0] & (C1_disp[3]) # !C1_disp[0] & C1_disp[2]) # !C1_disp[1] & C1_disp[2] & (C1_disp[0] $ C1_disp[3]);


--E1L1 is bcd_decoder:inst5|LED7S[0]~197
E1L1 = C1_disp[2] & !C1_disp[1] & (C1_disp[0] $ !C1_disp[3]) # !C1_disp[2] & C1_disp[0] & (C1_disp[1] $ !C1_disp[3]);


--C1_sel[5] is disp:inst2|sel[5]
C1_sel[5] = DFFEAS(C1L31, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_sel[4] is disp:inst2|sel[4]
C1_sel[4] = DFFEAS(C1L32, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_sel[3] is disp:inst2|sel[3]
C1_sel[3] = DFFEAS(C1L33, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_sel[2] is disp:inst2|sel[2]
C1_sel[2] = DFFEAS(C1L34, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_sel[1] is disp:inst2|sel[1]
C1_sel[1] = DFFEAS(C1L35, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_sel[0] is disp:inst2|sel[0]
C1_sel[0] = DFFEAS(C1L29, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_count[0] is disp:inst2|count[0]
C1_count[0] = DFFEAS(C1L3, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_count[2] is disp:inst2|count[2]
C1_count[2] = DFFEAS(C1L7, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1_count[1] is disp:inst2|count[1]
C1_count[1] = DFFEAS(C1L5, F1_clk_100, RESET,  ,  ,  ,  ,  ,  );


--C1L14 is disp:inst2|Mux~684
C1L14 = C1_count[0] # C1_count[2] $ !C1_count[1];


--F1_clk_100 is div_clock:inst6|clk_100
F1_clk_100 = DFFEAS(F1L44, CLK,  ,  , F1L43,  ,  ,  ,  );


--B1_h[0] is counter60:inst3|h[0]
B1_h[0] = DFFEAS(B1L11, inst15, RESET,  ,  ,  ,  ,  ,  );


--B1_l[0] is counter60:inst3|l[0]
B1_l[0] = DFFEAS(B1L20, inst15, RESET,  ,  ,  ,  ,  ,  );


--C1L15 is disp:inst2|Mux~685
C1L15 = C1_count[2] # C1_count[0] & B1_h[0] # !C1_count[0] & (B1_l[0]);


--D1_l[0] is counter24:inst4|l[0]
D1_l[0] = DFFEAS(D1L10, inst16, RESET,  ,  ,  ,  ,  ,  );


--B2_h[0] is counter60:inst|h[0]
B2_h[0] = DFFEAS(B2L11, A1L13, RESET,  ,  ,  ,  ,  ,  );


--B2_l[0] is counter60:inst|l[0]
B2_l[0] = DFFEAS(B2L23, A1L13, RESET,  ,  ,  ,  ,  ,  );


--C1L16 is disp:inst2|Mux~686
C1L16 = C1_count[2] & (C1_count[0]) # !C1_count[2] & (C1_count[0] & B2_h[0] # !C1_count[0] & (B2_l[0]));


--D1_h[0] is counter24:inst4|h[0]
D1_h[0] = DFFEAS(D1L4, inst16, RESET,  ,  ,  ,  ,  ,  );


--C1L17 is disp:inst2|Mux~687
C1L17 = C1_count[2] & (C1L16 & (D1_h[0]) # !C1L16 & D1_l[0]) # !C1_count[2] & (C1L16);


--C1L18 is disp:inst2|Mux~688
C1L18 = C1_count[1] & C1L15 # !C1_count[1] & (C1L17);


--B1_h[1] is counter60:inst3|h[1]
B1_h[1] = DFFEAS(B1L15, inst15, RESET,  ,  ,  ,  ,  ,  );


--B1_l[1] is counter60:inst3|l[1]
B1_l[1] = DFFEAS(B1L22, inst15, RESET,  ,  ,  ,  ,  ,  );


--C1L19 is disp:inst2|Mux~689
C1L19 = C1_count[2] # C1_count[0] & B1_h[1] # !C1_count[0] & (B1_l[1]);


--D1_l[1] is counter24:inst4|l[1]
D1_l[1] = DFFEAS(D1L12, inst16, RESET,  ,  ,  ,  ,  ,  );


--B2_h[1] is counter60:inst|h[1]
B2_h[1] = DFFEAS(B2L15, A1L13, RESET,  ,  ,  ,  ,  ,  );


--B2_l[1] is counter60:inst|l[1]
B2_l[1] = DFFEAS(B2L25, A1L13, RESET,  ,  ,  ,  ,  ,  );


--C1L20 is disp:inst2|Mux~690
C1L20 = C1_count[2] & (C1_count[0]) # !C1_count[2] & (C1_count[0] & B2_h[1] # !C1_count[0] & (B2_l[1]));


--D1_h[1] is counter24:inst4|h[1]
D1_h[1] = DFFEAS(D1L7, inst16, RESET,  ,  ,  ,  ,  ,  );


--C1L21 is disp:inst2|Mux~691
C1L21 = C1_count[2] & (C1L20 & (D1_h[1]) # !C1L20 & D1_l[1]) # !C1_count[2] & (C1L20);


--C1L22 is disp:inst2|Mux~692
C1L22 = C1_count[1] & C1L19 # !C1_count[1] & (C1L21);


--B1_l[2] is counter60:inst3|l[2]
B1_l[2] = DFFEAS(B1L24, inst15, RESET,  ,  ,  ,  ,  ,  );


--B2_h[2] is counter60:inst|h[2]
B2_h[2] = DFFEAS(B2L17, A1L13, RESET,  ,  ,  ,  ,  ,  );


--B2_l[2] is counter60:inst|l[2]
B2_l[2] = DFFEAS(B2L27, A1L13, RESET,  ,  ,  ,  ,  ,  );


--C1L23 is disp:inst2|Mux~693
C1L23 = C1_count[1] & (C1_count[0]) # !C1_count[1] & (C1_count[0] & B2_h[2] # !C1_count[0] & (B2_l[2]));


--B1_h[2] is counter60:inst3|h[2]
B1_h[2] = DFFEAS(B1L17, inst15, RESET,  ,  ,  ,  ,  ,  );


--C1L24 is disp:inst2|Mux~694
C1L24 = C1_count[1] & (C1L23 & (B1_h[2]) # !C1L23 & B1_l[2]) # !C1_count[1] & (C1L23);


--D1_l[2] is counter24:inst4|l[2]
D1_l[2] = DFFEAS(D1L14, inst16, RESET,  ,  ,  ,  ,  ,  );


--C1L25 is disp:inst2|Mux~695
C1L25 = D1_l[2] & !C1_count[0];


--C1L26 is disp:inst2|Mux~696
C1L26 = C1_count[2] & (C1_count[1] # C1L25) # !C1_count[2] & C1L24;


--D1_l[3] is counter24:inst4|l[3]
D1_l[3] = DFFEAS(D1L20, inst16, RESET,  ,  ,  ,  ,  ,  );


--C1L27 is disp:inst2|Mux~697
C1L27 = C1_count[2] & (C1_count[1] # D1_l[3] & !C1_count[0]);


--B1_l[3] is counter60:inst3|l[3]
B1_l[3] = DFFEAS(B1L29, inst15, RESET,  ,  ,  ,  ,  ,  );


--C1L28 is disp:inst2|Mux~698
C1L28 = C1_count[1] & B1_l[3] & !C1_count[0];


--B2_l[3] is counter60:inst|l[3]
B2_l[3] = DFFEAS(B2L29, A1L13, RESET,  ,  ,  ,  ,  ,  );


--C1L29 is disp:inst2|Mux~699
C1L29 = !C1_count[0] & !C1_count[2] & !C1_count[1];


--C1L30 is disp:inst2|Mux~700
C1L30 = C1L27 # C1L28 # B2_l[3] & C1L29;


--C1L31 is disp:inst2|Mux~701
C1L31 = C1_count[0] & C1_count[2] & !C1_count[1];


--C1L32 is disp:inst2|Mux~702
C1L32 = C1_count[2] & !C1_count[0] & !C1_count[1];


--C1L33 is disp:inst2|Mux~703
C1L33 = C1_count[0] & C1_count[1] & !C1_count[2];


--C1L34 is disp:inst2|Mux~704
C1L34 = C1_count[1] & !C1_count[0] & !C1_count[2];


--C1L35 is disp:inst2|Mux~705
C1L35 = C1_count[0] & !C1_count[2] & !C1_count[1];


--C1L7 is disp:inst2|count[2]~46
C1L7 = C1_count[2] $ (C1_count[0] & C1_count[1]);


--C1L5 is disp:inst2|count[1]~47
C1L5 = C1_count[0] $ C1_count[1];


--F1_count1[12] is div_clock:inst6|count1[12]
F1_count1[12] = DFFEAS(F1L59, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[9] is div_clock:inst6|count1[9]
F1_count1[9] = DFFEAS(F1L60, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[11] is div_clock:inst6|count1[11]
F1_count1[11] = DFFEAS(F1L23, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[10] is div_clock:inst6|count1[10]
F1_count1[10] = DFFEAS(F1L21, CLK,  ,  ,  ,  ,  ,  ,  );


--A1L18 is rtl~206
A1L18 = F1_count1[12] & F1_count1[9] & !F1_count1[11] & !F1_count1[10];


--F1_count1[8] is div_clock:inst6|count1[8]
F1_count1[8] = DFFEAS(F1L61, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[7] is div_clock:inst6|count1[7]
F1_count1[7] = DFFEAS(F1L62, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[6] is div_clock:inst6|count1[6]
F1_count1[6] = DFFEAS(F1L13, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[5] is div_clock:inst6|count1[5]
F1_count1[5] = DFFEAS(F1L11, CLK,  ,  ,  ,  ,  ,  ,  );


--A1L19 is rtl~207
A1L19 = F1_count1[8] & F1_count1[7] & !F1_count1[6] & !F1_count1[5];


--F1_count1[3] is div_clock:inst6|count1[3]
F1_count1[3] = DFFEAS(F1L63, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[4] is div_clock:inst6|count1[4]
F1_count1[4] = DFFEAS(F1L9, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[2] is div_clock:inst6|count1[2]
F1_count1[2] = DFFEAS(F1L5, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count1[1] is div_clock:inst6|count1[1]
F1_count1[1] = DFFEAS(F1L3, CLK,  ,  ,  ,  ,  ,  ,  );


--A1L20 is rtl~208
A1L20 = F1_count1[3] & !F1_count1[4] & !F1_count1[2] & !F1_count1[1];


--F1_count1[0] is div_clock:inst6|count1[0]
F1_count1[0] = DFFEAS(F1L64, CLK,  ,  ,  ,  ,  ,  ,  );


--A1L21 is rtl~209
A1L21 = A1L18 & A1L19 & A1L20 & !F1_count1[0];


--F1_count2[2] is div_clock:inst6|count2[2]
F1_count2[2] = DFFEAS(F1L72, CLK,  ,  , A1L21,  ,  ,  ,  );


--F1_count2[0] is div_clock:inst6|count2[0]
F1_count2[0] = DFFEAS(F1L67, CLK,  ,  , A1L21,  ,  ,  ,  );


--F1_count2[3] is div_clock:inst6|count2[3]
F1_count2[3] = DFFEAS(F1L71, CLK,  ,  ,  ,  ,  ,  ,  );


--F1_count2[1] is div_clock:inst6|count2[1]
F1_count2[1] = DFFEAS(F1L73, CLK,  ,  , A1L21,  ,  ,  ,  );


--A1L22 is rtl~210
A1L22 = F1_count2[2] & F1_count2[0] & !F1_count2[3] & !F1_count2[1];


--F1L43 is div_clock:inst6|clk_100~0
F1L43 = A1L21 & A1L22;


--B1L10 is counter60:inst3|h[0]~701
B1L10 = B1_l[0] & B1_l[3] & !B1_l[1] & !B1_l[2];


--B1L11 is counter60:inst3|h[0]~702
B1L11 = B1_h[1] & !B1_h[2] & (B1_h[0] $ B1L10) # !B1_h[1] & (B1_h[0] $ B1L10);


--B2_cout is counter60:inst|cout
B2_cout = DFFEAS(B2L7, A1L13, RESET,  ,  ,  ,  ,  ,  );


--G1_mode[1] is sel_mode:inst9|mode[1]
G1_mode[1] = DFFEAS(G1L5, KEY_MODE, RESET,  ,  ,  ,  ,  ,  );


--G1_mode[0] is sel_mode:inst9|mode[0]
G1_mode[0] = DFFEAS(G1L3, KEY_MODE, RESET,  ,  ,  ,  ,  ,  );


--inst15 is inst15
inst15 = B2_cout # G1_mode[1] & KEY_CHANGE & !G1_mode[0];


--B1L26 is counter60:inst3|l[3]~570
B1L26 = B1_l[3] & (B1_l[0] # B1_l[1] # B1_l[2]);


--B1L27 is counter60:inst3|l[3]~571
B1L27 = B1L26 & !B1L10 & (!B1_h[2] # !B1_h[1]);


--B1L28 is counter60:inst3|l[3]~572
B1L28 = !B1L26 & (!B1_h[2] # !B1_h[1]);


--B1L20 is counter60:inst3|l[0]~573
B1L20 = B1_l[0] & B1L27 # !B1_l[0] & !B1L27 & B1L28;


--D1L16 is counter24:inst4|l[3]~838
D1L16 = D1_l[3] & (D1_l[1] # D1_h[1] # D1_l[2]);


--D1L17 is counter24:inst4|l[3]~839
D1L17 = D1L16 # D1_h[1] & (D1_h[0] # D1_l[2]);


--D1L21 is counter24:inst4|LessThan~148
D1L21 = !D1_l[0] & !D1_l[1] & !D1_l[2] # !D1_l[3];


--D1L18 is counter24:inst4|l[3]~840
D1L18 = !D1_l[2] & !D1_l[3];


--D1L22 is counter24:inst4|LessThan~149
D1L22 = D1_l[0] & D1_l[1];


--D1L19 is counter24:inst4|l[3]~841
D1L19 = D1_h[1] & (D1L18 & !D1L22) # !D1_h[1] & D1L21;


--D1L10 is counter24:inst4|l[0]~842
D1L10 = D1_l[0] & D1L17 # !D1_l[0] & !D1L17 & D1L19;


--B1_cout is counter60:inst3|cout
B1_cout = DFFEAS(B1L7, inst15, RESET,  ,  ,  ,  ,  ,  );


--inst16 is inst16
inst16 = B1_cout # G1_mode[0] & G1_mode[1] & KEY_CHANGE;


--B2L10 is counter60:inst|h[0]~688
B2L10 = B2_l[0] & B2_l[3] & !B2_l[1] & !B2_l[2];


--B2L11 is counter60:inst|h[0]~689
B2L11 = B2_h[1] & !B2_h[2] & (B2_h[0] $ B2L10) # !B2_h[1] & (B2_h[0] $ B2L10);


--F1_clk_1 is div_clock:inst6|clk_1
F1_clk_1 = DFFEAS(F1L41, CLK,  ,  ,  ,  ,  ,  ,  );


--A1L13 is inst17~38
A1L13 = !G1_mode[1] & (G1_mode[0] & KEY_CHANGE # !G1_mode[0] & (F1_clk_1));


--B2L20 is counter60:inst|l[0]~560
B2L20 = B2_l[3] & (B2_l[0] # B2_l[1] # B2_l[2]);


--B2L21 is counter60:inst|l[0]~561
B2L21 = B2L20 & !B2L10 & (!B2_h[2] # !B2_h[1]);


--B2L22 is counter60:inst|l[0]~562
B2L22 = !B2L20 & (!B2_h[2] # !B2_h[1]);


--B2L23 is counter60:inst|l[0]~563
B2L23 = B2_l[0] & B2L21 # !B2_l[0] & !B2L21 & B2L22;


--A1L23 is rtl~211
A1L23 = D1_l[0] & D1_l[3] & !D1_l[1] & !D1_l[2];