cmultipler.hif

复乘法器的FPGA实现

Version 6.1 Build 201 11/27/2006 SJ Full Version
7
487
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
ADDSUB_16_0
# storage
db|CMULTIPLER.(1).cnf
db|CMULTIPLER.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
ADDSUB_16_0.v
7fc68afb1628e1146b3f50c895bb32bb
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
word_in_size
16
PARAMETER_SIGNED_DEC
DEF
}
# hierarchies {
ADDSUB_16_0:add1
ADDSUB_16_0:add2
ADDSUB_16_0:add3
ADDSUB_16_0:sub1
ADDSUB_16_0:sub2
}
# end
# entity
add_sub_4od
# storage
db|CMULTIPLER.(4).cnf
db|CMULTIPLER.(4).cnf
# case_insensitive
# source_file
db|add_sub_4od.tdf
6637aafdce9cc9a98f8ae3fabdd4fc15
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
add_sub
-1
3
}
# hierarchies {
ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated
ADDSUB_16_0:add2|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated
ADDSUB_16_0:add3|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated
ADDSUB_16_0:sub1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated
ADDSUB_16_0:sub2|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated
}
# end
# entity
MULTP
# storage
db|CMULTIPLER.(5).cnf
db|CMULTIPLER.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
MULTP.v
8c2ab53a02c74e8f6dcd6a5416d513
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
MULTP:mult1
MULTP:mult2
MULTP:mult3
}
# end
# entity
mult_2su
# storage
db|CMULTIPLER.(7).cnf
db|CMULTIPLER.(7).cnf
# case_insensitive
# source_file
db|mult_2su.tdf
c18269309533f87b7425827246afdd
6
# user_parameter {
dataa_width
1
PARAMETER_UNKNOWN
DEF
datab_width
1
PARAMETER_UNKNOWN
DEF
datac_width
1
PARAMETER_UNKNOWN
DEF
datad_width
1
PARAMETER_UNKNOWN
DEF
dataout_width
144
PARAMETER_UNKNOWN
DEF
}
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# hierarchies {
MULTP:mult1|lpm_mult:lpm_mult_component|mult_2su:auto_generated
MULTP:mult2|lpm_mult:lpm_mult_component|mult_2su:auto_generated
MULTP:mult3|lpm_mult:lpm_mult_component|mult_2su:auto_generated
}
# end
# entity
add_sub_3od
# storage
db|CMULTIPLER.(9).cnf
db|CMULTIPLER.(9).cnf
# case_insensitive
# source_file
db|add_sub_3od.tdf
89fa14aefa874ce1901afea5c8fa28e2
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
add_sub
-1
3
}
# end
# entity
CMULTIPLEX
# storage
db|CMULTIPLER.(0).cnf
db|CMULTIPLER.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
CMULTIPLEX.v
1abd69263de1a4ece27493a1ec24f454
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
word_in_size
16
PARAMETER_SIGNED_DEC
DEF
}
# hierarchies {
|
}
# end
# entity
ADDSUB
# storage
db|CMULTIPLER.(2).cnf
db|CMULTIPLER.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
ADDSUB.v
135c60d68063c681ff6282b559166514
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
ADDSUB_16_0:add1|ADDSUB:addsub
ADDSUB_16_0:add2|ADDSUB:addsub
ADDSUB_16_0:add3|ADDSUB:addsub
ADDSUB_16_0:sub1|ADDSUB:addsub
ADDSUB_16_0:sub2|ADDSUB:addsub
}
# end
# entity
lpm_add_sub
# storage
db|CMULTIPLER.(3).cnf
db|CMULTIPLER.(3).cnf
# case_insensitive
# source_file
..|..|..|libraries|megafunctions|lpm_add_sub.tdf
c0d5e91956d9d3dd9ad812cc9c56861
6
# user_parameter {
LPM_WIDTH
17
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Stratix II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_4od
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
add_sub
-1
3
}
# include_file {
..|..|..|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
..|..|..|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
..|..|..|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
..|..|..|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
..|..|..|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
..|..|..|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
..|..|..|libraries|megafunctions|aglobal61.inc
b513fb574ceb8f5886cd4ba429e82ec
}
# hierarchies {
ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component
ADDSUB_16_0:add2|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component
ADDSUB_16_0:add3|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component
ADDSUB_16_0:sub1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component
ADDSUB_16_0:sub2|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component
}
# end
# entity
lpm_mult
# storage
db|CMULTIPLER.(6).cnf
db|CMULTIPLER.(6).cnf
# case_insensitive
# source_file
..|..|..|libraries|megafunctions|lpm_mult.tdf
b667ddb4c1fb4f9df0f26e8c7fe21cf0
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTHA
16
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHB
16
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHP
32
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHR
0
PARAMETER_UNKNOWN
DEF
LPM_WIDTHS
1
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
2
PARAMETER_SIGNED_DEC
USR
LATENCY
0
PARAMETER_UNKNOWN
DEF
INPUT_A_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
INPUT_B_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
USE_EAB
OFF
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Stratix II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
APEX20K_TECHNOLOGY_MAPPER
LUT
TECH_MAPPER_APEX20K
USR
DEDICATED_MULTIPLIER_CIRCUITRY
YES
PARAMETER_UNKNOWN
USR
DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mult_2su
PARAMETER_UNKNOWN
USR
INPUT_A_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
INPUT_B_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
USE_AHDL_IMPLEMENTATION
OFF
PARAMETER_UNKNOWN
DEF
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
sum
-1
1
}
# include_file {
..|..|..|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
..|..|..|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
..|..|..|libraries|megafunctions|aglobal61.inc
b513fb574ceb8f5886cd4ba429e82ec
..|..|..|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
..|..|..|libraries|megafunctions|multcore.inc
13b7e8bee916e23c5f79837e9c670
}
# hierarchies {
MULTP:mult1|lpm_mult:lpm_mult_component
MULTP:mult2|lpm_mult:lpm_mult_component
MULTP:mult3|lpm_mult:lpm_mult_component
}
# end
# complete