add_sub_4od.tdf

复乘法器的FPGA实现

--lpm_add_sub CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 DEVICE_FAMILY="Stratix II" LPM_WIDTH=17 ONE_INPUT_IS_CONSTANT="NO" add_sub dataa datab result
--VERSION_BEGIN 6.1 cbx_cycloneii 2006:09:29:19:03:26:SJ cbx_lpm_add_sub 2006:10:10:22:03:24:SJ cbx_mgl 2006:10:27:16:08:48:SJ cbx_stratix 2006:09:18:10:47:42:SJ cbx_stratixii 2006:10:13:14:01:30:SJ  VERSION_END


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--  without limitation, that your use is for the sole purpose of 
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FUNCTION stratixii_lcell_comb (cin, dataa, datab, datac, datad, datae, dataf, datag, sharein)
WITH ( 	EXTENDED_LUT,	LUT_MASK,	SHARED_ARITH) 
RETURNS ( combout, cout, shareout, sumout);

--synthesis_resources = lut 17 
SUBDESIGN add_sub_4od
( 
	add_sub	:	input;
	dataa[16..0]	:	input;
	datab[16..0]	:	input;
	result[16..0]	:	output;
) 
VARIABLE 
	add_sub_cella[16..0] : stratixii_lcell_comb
		WITH (
			EXTENDED_LUT = "OFF",
			LUT_MASK = "000033CC0000AAAA",
			SHARED_ARITH = "OFF"
		);
	lsb_cin_wire[0..0]	: WIRE;

BEGIN 
	add_sub_cella[].cin = ( add_sub_cella[15..0].cout, lsb_cin_wire[]);
	add_sub_cella[].dataa = dataa[];
	add_sub_cella[].datab = datab[];
	add_sub_cella[].dataf = add_sub;
	lsb_cin_wire[] = (! add_sub);
	result[] = ( add_sub_cella[16..0].sumout);
END;
--VALID FILE