cmultipler.fit.eqn

复乘法器的FPGA实现

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--A1L40Q is iout[0]~reg0 at LCFF_X29_Y11_N23
A1L40Q = DFFEAS( , GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena, sigbuf8[0],  ,  , VCC);


--A1L42Q is iout[1]~reg0 at LCFF_X30_Y11_N29
A1L42Q = DFFEAS(A1L43, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L45Q is iout[2]~reg0 at LCFF_X30_Y11_N13
A1L45Q = DFFEAS( , GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena, sigbuf8[2],  ,  , VCC);


--A1L47Q is iout[3]~reg0 at LCFF_X30_Y11_N3
A1L47Q = DFFEAS(sigbuf8[3], GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L49Q is iout[4]~reg0 at LCFF_X30_Y11_N25
A1L49Q = DFFEAS(A1L50, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L52Q is iout[5]~reg0 at LCFF_X29_Y10_N17
A1L52Q = DFFEAS( , GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena, sigbuf8[5],  ,  , VCC);


--A1L54Q is iout[6]~reg0 at LCFF_X29_Y10_N29
A1L54Q = DFFEAS(A1L55, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L57Q is iout[7]~reg0 at LCFF_X29_Y10_N1
A1L57Q = DFFEAS( , GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena, sigbuf8[7],  ,  , VCC);


--A1L59Q is iout[8]~reg0 at LCFF_X29_Y10_N13
A1L59Q = DFFEAS(A1L60, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L62Q is iout[9]~reg0 at LCFF_X30_Y11_N9
A1L62Q = DFFEAS( , GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena, sigbuf8[9],  ,  , VCC);


--A1L64Q is iout[10]~reg0 at LCFF_X30_Y11_N19
A1L64Q = DFFEAS(sigbuf8[10], GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L66Q is iout[11]~reg0 at LCFF_X29_Y10_N21
A1L66Q = DFFEAS(A1L67, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L69Q is iout[12]~reg0 at LCFF_X29_Y10_N5
A1L69Q = DFFEAS( , GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena, sigbuf8[12],  ,  , VCC);


--A1L71Q is iout[13]~reg0 at LCFF_X29_Y10_N25
A1L71Q = DFFEAS(A1L72, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L74Q is iout[14]~reg0 at LCFF_X29_Y10_N9
A1L74Q = DFFEAS(A1L75, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L77Q is iout[15]~reg0 at LCFF_X30_Y10_N25
A1L77Q = DFFEAS(A1L78, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L115Q is qout[0]~reg0 at LCFF_X27_Y12_N29
A1L115Q = DFFEAS(B5L1, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L117Q is qout[1]~reg0 at LCFF_X27_Y12_N23
A1L117Q = DFFEAS(B5L2, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L119Q is qout[2]~reg0 at LCFF_X27_Y13_N1
A1L119Q = DFFEAS(B5L3, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L121Q is qout[3]~reg0 at LCFF_X29_Y11_N21
A1L121Q = DFFEAS(B5L4, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L123Q is qout[4]~reg0 at LCFF_X27_Y13_N7
A1L123Q = DFFEAS(B5L5, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L125Q is qout[5]~reg0 at LCFF_X27_Y13_N5
A1L125Q = DFFEAS(B5L6, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L127Q is qout[6]~reg0 at LCFF_X27_Y13_N11
A1L127Q = DFFEAS(B5L7, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L129Q is qout[7]~reg0 at LCFF_X27_Y13_N9
A1L129Q = DFFEAS(B5L8, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L131Q is qout[8]~reg0 at LCFF_X27_Y13_N3
A1L131Q = DFFEAS(B5L9, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L133Q is qout[9]~reg0 at LCFF_X27_Y12_N21
A1L133Q = DFFEAS(B5L10, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L135Q is qout[10]~reg0 at LCFF_X27_Y12_N19
A1L135Q = DFFEAS(B5L11, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L137Q is qout[11]~reg0 at LCFF_X27_Y12_N17
A1L137Q = DFFEAS(B5L12, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L139Q is qout[12]~reg0 at LCFF_X27_Y12_N27
A1L139Q = DFFEAS(B5L13, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L141Q is qout[13]~reg0 at LCFF_X27_Y12_N25
A1L141Q = DFFEAS(B5L14, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L143Q is qout[14]~reg0 at LCFF_X27_Y12_N31
A1L143Q = DFFEAS(B5L15, GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--A1L145Q is qout[15]~reg0 at LCFF_X27_Y12_N15
A1L145Q = DFFEAS(F5_result[16], GLOBAL(A1L3), !GLOBAL(A1L147),  , clkena,  ,  ,  ,  );


--F1_result[0] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[0] at LCCOMB_X26_Y13_N16
F1_result[0]_adder_eqn = ( ia[0] ) + ( qa[0] ) + ( GND );
F1_result[0] = SUM(F1_result[0]_adder_eqn);

--F1L4 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[0]~COUT at LCCOMB_X26_Y13_N16
F1L4_adder_eqn = ( ia[0] ) + ( qa[0] ) + ( GND );
F1L4 = CARRY(F1L4_adder_eqn);


--F1_result[1] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[1] at LCCOMB_X26_Y13_N18
F1_result[1]_adder_eqn = ( ia[1] ) + ( qa[1] ) + ( F1L4 );
F1_result[1] = SUM(F1_result[1]_adder_eqn);

--F1L8 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[1]~COUT at LCCOMB_X26_Y13_N18
F1L8_adder_eqn = ( ia[1] ) + ( qa[1] ) + ( F1L4 );
F1L8 = CARRY(F1L8_adder_eqn);


--F1_result[2] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[2] at LCCOMB_X26_Y13_N20
F1_result[2]_adder_eqn = ( ia[2] ) + ( qa[2] ) + ( F1L8 );
F1_result[2] = SUM(F1_result[2]_adder_eqn);

--F1L12 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[2]~COUT at LCCOMB_X26_Y13_N20
F1L12_adder_eqn = ( ia[2] ) + ( qa[2] ) + ( F1L8 );
F1L12 = CARRY(F1L12_adder_eqn);


--F1_result[3] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[3] at LCCOMB_X26_Y13_N22
F1_result[3]_adder_eqn = ( ia[3] ) + ( qa[3] ) + ( F1L12 );
F1_result[3] = SUM(F1_result[3]_adder_eqn);

--F1L16 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[3]~COUT at LCCOMB_X26_Y13_N22
F1L16_adder_eqn = ( ia[3] ) + ( qa[3] ) + ( F1L12 );
F1L16 = CARRY(F1L16_adder_eqn);


--F1_result[4] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[4] at LCCOMB_X26_Y13_N24
F1_result[4]_adder_eqn = ( ia[4] ) + ( qa[4] ) + ( F1L16 );
F1_result[4] = SUM(F1_result[4]_adder_eqn);

--F1L20 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[4]~COUT at LCCOMB_X26_Y13_N24
F1L20_adder_eqn = ( ia[4] ) + ( qa[4] ) + ( F1L16 );
F1L20 = CARRY(F1L20_adder_eqn);


--F1_result[5] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[5] at LCCOMB_X26_Y13_N26
F1_result[5]_adder_eqn = ( ia[5] ) + ( qa[5] ) + ( F1L20 );
F1_result[5] = SUM(F1_result[5]_adder_eqn);

--F1L24 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[5]~COUT at LCCOMB_X26_Y13_N26
F1L24_adder_eqn = ( ia[5] ) + ( qa[5] ) + ( F1L20 );
F1L24 = CARRY(F1L24_adder_eqn);


--F1_result[6] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[6] at LCCOMB_X26_Y13_N28
F1_result[6]_adder_eqn = ( ia[6] ) + ( qa[6] ) + ( F1L24 );
F1_result[6] = SUM(F1_result[6]_adder_eqn);

--F1L28 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[6]~COUT at LCCOMB_X26_Y13_N28
F1L28_adder_eqn = ( ia[6] ) + ( qa[6] ) + ( F1L24 );
F1L28 = CARRY(F1L28_adder_eqn);


--F1_result[7] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[7] at LCCOMB_X26_Y13_N30
F1_result[7]_adder_eqn = ( ia[7] ) + ( qa[7] ) + ( F1L28 );
F1_result[7] = SUM(F1_result[7]_adder_eqn);

--F1L32 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[7]~COUT at LCCOMB_X26_Y13_N30
F1L32_adder_eqn = ( ia[7] ) + ( qa[7] ) + ( F1L28 );
F1L32 = CARRY(F1L32_adder_eqn);


--F1_result[8] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[8] at LCCOMB_X26_Y12_N0
F1_result[8]_adder_eqn = ( ia[8] ) + ( qa[8] ) + ( F1L32 );
F1_result[8] = SUM(F1_result[8]_adder_eqn);

--F1L36 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[8]~COUT at LCCOMB_X26_Y12_N0
F1L36_adder_eqn = ( ia[8] ) + ( qa[8] ) + ( F1L32 );
F1L36 = CARRY(F1L36_adder_eqn);


--F1_result[9] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[9] at LCCOMB_X26_Y12_N2
F1_result[9]_adder_eqn = ( ia[9] ) + ( qa[9] ) + ( F1L36 );
F1_result[9] = SUM(F1_result[9]_adder_eqn);

--F1L40 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[9]~COUT at LCCOMB_X26_Y12_N2
F1L40_adder_eqn = ( ia[9] ) + ( qa[9] ) + ( F1L36 );
F1L40 = CARRY(F1L40_adder_eqn);


--F1_result[10] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[10] at LCCOMB_X26_Y12_N4
F1_result[10]_adder_eqn = ( ia[10] ) + ( qa[10] ) + ( F1L40 );
F1_result[10] = SUM(F1_result[10]_adder_eqn);

--F1L44 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[10]~COUT at LCCOMB_X26_Y12_N4
F1L44_adder_eqn = ( ia[10] ) + ( qa[10] ) + ( F1L40 );
F1L44 = CARRY(F1L44_adder_eqn);


--F1_result[11] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[11] at LCCOMB_X26_Y12_N6
F1_result[11]_adder_eqn = ( ia[11] ) + ( qa[11] ) + ( F1L44 );
F1_result[11] = SUM(F1_result[11]_adder_eqn);

--F1L48 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[11]~COUT at LCCOMB_X26_Y12_N6
F1L48_adder_eqn = ( ia[11] ) + ( qa[11] ) + ( F1L44 );
F1L48 = CARRY(F1L48_adder_eqn);


--F1_result[12] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[12] at LCCOMB_X26_Y12_N8
F1_result[12]_adder_eqn = ( ia[12] ) + ( qa[12] ) + ( F1L48 );
F1_result[12] = SUM(F1_result[12]_adder_eqn);

--F1L52 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[12]~COUT at LCCOMB_X26_Y12_N8
F1L52_adder_eqn = ( ia[12] ) + ( qa[12] ) + ( F1L48 );
F1L52 = CARRY(F1L52_adder_eqn);


--F1_result[13] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[13] at LCCOMB_X26_Y12_N10
F1_result[13]_adder_eqn = ( ia[13] ) + ( qa[13] ) + ( F1L52 );
F1_result[13] = SUM(F1_result[13]_adder_eqn);

--F1L56 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[13]~COUT at LCCOMB_X26_Y12_N10
F1L56_adder_eqn = ( ia[13] ) + ( qa[13] ) + ( F1L52 );
F1L56 = CARRY(F1L56_adder_eqn);


--F1_result[14] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[14] at LCCOMB_X26_Y12_N12
F1_result[14]_adder_eqn = ( ia[14] ) + ( qa[14] ) + ( F1L56 );
F1_result[14] = SUM(F1_result[14]_adder_eqn);

--F1L60 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[14]~COUT at LCCOMB_X26_Y12_N12
F1L60_adder_eqn = ( ia[14] ) + ( qa[14] ) + ( F1L56 );
F1L60 = CARRY(F1L60_adder_eqn);


--F1_result[15] is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|result[15] at LCCOMB_X26_Y12_N14
F1_result[15]_adder_eqn = ( ia[15] ) + ( qa[15] ) + ( F1L60 );
F1_result[15] = SUM(F1_result[15]_adder_eqn);

--F1L64 is ADDSUB_16_0:add1|ADDSUB:addsub|lpm_add_sub:lpm_add_sub_component|add_sub_4od:auto_generated|add_sub_cella[15]~COUT at LCCOMB_X26_Y12_N14
F1L64_adder_eqn = ( ia[15] ) + ( qa[15] ) + ( F1L60 );