prev_cmp_lab4.tan.qmsg

用VHDL编译的源代码

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Web Edition " "Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 25 06:04:40 2008 " "Info: Processing started: Thu Sep 25 06:04:40 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off lab4 -c lab4 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off lab4 -c lab4 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "rin\[4\] sseg2\[6\] 14.222 ns Longest " "Info: Longest tpd from source pin \"rin\[4\]\" to destination pin \"sseg2\[6\]\" is 14.222 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns rin\[4\] 1 PIN PIN_V12 10 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_V12; Fanout = 10; PIN Node = 'rin\[4\]'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rin[4] } "NODE_NAME" } } { "lab4.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/lab4.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.999 ns) + CELL(0.458 ns) 3.463 ns encoder:u1\|fst~392 2 COMB LCCOMB_X19_Y13_N2 2 " "Info: 2: + IC(1.999 ns) + CELL(0.458 ns) = 3.463 ns; Loc. = LCCOMB_X19_Y13_N2; Fanout = 2; COMB Node = 'encoder:u1\|fst~392'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "2.457 ns" { rin[4] encoder:u1|fst~392 } "NODE_NAME" } } { "encoder.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/encoder.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.104 ns) + CELL(0.521 ns) 5.088 ns encoder:u1\|snd\[1\]~3437 3 COMB LCCOMB_X14_Y13_N26 2 " "Info: 3: + IC(1.104 ns) + CELL(0.521 ns) = 5.088 ns; Loc. = LCCOMB_X14_Y13_N26; Fanout = 2; COMB Node = 'encoder:u1\|snd\[1\]~3437'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "1.625 ns" { encoder:u1|fst~392 encoder:u1|snd[1]~3437 } "NODE_NAME" } } { "encoder.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/encoder.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.293 ns) + CELL(0.178 ns) 5.559 ns encoder:u1\|snd\[1\]~3442 4 COMB LCCOMB_X14_Y13_N20 2 " "Info: 4: + IC(0.293 ns) + CELL(0.178 ns) = 5.559 ns; Loc. = LCCOMB_X14_Y13_N20; Fanout = 2; COMB Node = 'encoder:u1\|snd\[1\]~3442'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "0.471 ns" { encoder:u1|snd[1]~3437 encoder:u1|snd[1]~3442 } "NODE_NAME" } } { "encoder.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/encoder.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.135 ns) + CELL(0.319 ns) 7.013 ns encoder:u1\|snd\[1\]~3449 5 COMB LCCOMB_X19_Y13_N4 1 " "Info: 5: + IC(1.135 ns) + CELL(0.319 ns) = 7.013 ns; Loc. = LCCOMB_X19_Y13_N4; Fanout = 1; COMB Node = 'encoder:u1\|snd\[1\]~3449'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "1.454 ns" { encoder:u1|snd[1]~3442 encoder:u1|snd[1]~3449 } "NODE_NAME" } } { "encoder.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/encoder.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.294 ns) + CELL(0.322 ns) 7.629 ns encoder:u1\|snd\[1\]~3450 6 COMB LCCOMB_X19_Y13_N22 7 " "Info: 6: + IC(0.294 ns) + CELL(0.322 ns) = 7.629 ns; Loc. = LCCOMB_X19_Y13_N22; Fanout = 7; COMB Node = 'encoder:u1\|snd\[1\]~3450'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "0.616 ns" { encoder:u1|snd[1]~3449 encoder:u1|snd[1]~3450 } "NODE_NAME" } } { "encoder.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/encoder.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.434 ns) + CELL(0.178 ns) 10.241 ns bin2led:u3\|Mux0~3 7 COMB LCCOMB_X4_Y21_N12 1 " "Info: 7: + IC(2.434 ns) + CELL(0.178 ns) = 10.241 ns; Loc. = LCCOMB_X4_Y21_N12; Fanout = 1; COMB Node = 'bin2led:u3\|Mux0~3'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "2.612 ns" { encoder:u1|snd[1]~3450 bin2led:u3|Mux0~3 } "NODE_NAME" } } { "bin2led.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/bin2led.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.121 ns) + CELL(2.860 ns) 14.222 ns sseg2\[6\] 8 PIN PIN_D1 0 " "Info: 8: + IC(1.121 ns) + CELL(2.860 ns) = 14.222 ns; Loc. = PIN_D1; Fanout = 0; PIN Node = 'sseg2\[6\]'" {  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "3.981 ns" { bin2led:u3|Mux0~3 sseg2[6] } "NODE_NAME" } } { "lab4.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/lab4/lab4.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.842 ns ( 41.08 % ) " "Info: Total cell delay = 5.842 ns ( 41.08 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.380 ns ( 58.92 % ) " "Info: Total interconnect delay = 8.380 ns ( 58.92 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80sp1/quartus/bin/TimingClosureFloorplan.fld" "" "14.222 ns" { rin[4] encoder:u1|fst~392 encoder:u1|snd[1]~3437 encoder:u1|snd[1]~3442 encoder:u1|snd[1]~3449 encoder:u1|snd[1]~3450 bin2led:u3|Mux0~3 sseg2[6] } "NODE_NAME" } } { "d:/altera/80sp1/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/80sp1/quartus/bin/Technology_Viewer.qrui" "14.222 ns" { rin[4] {} rin[4]~combout {} encoder:u1|fst~392 {} encoder:u1|snd[1]~3437 {} encoder:u1|snd[1]~3442 {} encoder:u1|snd[1]~3449 {} encoder:u1|snd[1]~3450 {} bin2led:u3|Mux0~3 {} sseg2[6] {} } { 0.000ns 0.000ns 1.999ns 1.104ns 0.293ns 1.135ns 0.294ns 2.434ns 1.121ns } { 0.000ns 1.006ns 0.458ns 0.521ns 0.178ns 0.319ns 0.322ns 0.178ns 2.860ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "123 " "Info: Peak virtual memory: 123 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 25 06:04:41 2008 " "Info: Processing ended: Thu Sep 25 06:04:41 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}