prev_cmp_fourbitincrement.qmsg

用VHDL编译的源代码

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 0}
{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "4 " "Warning: Found 4 output pins without output pin load capacitance assignment" { { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "y\[0\] 0 " "Info: Pin \"y\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "y\[1\] 0 " "Info: Pin \"y\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "y\[2\] 0 " "Info: Pin \"y\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "y\[3\] 0 " "Info: Pin \"y\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 0}  } {  } 0 0 "Found %1!d! output pins without output pin load capacitance assignment" 0 0 "" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 0}
{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 0 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/fourbitincrement/fourbitincrement.fit.smsg " "Info: Generated suppressed messages file C:/fourbitincrement/fourbitincrement.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 6 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "200 " "Info: Peak virtual memory: 200 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Sep 16 15:00:03 2008 " "Info: Processing ended: Tue Sep 16 15:00:03 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:07 " "Info: Total CPU time (on all processors): 00:00:07" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Sep 16 15:00:04 2008 " "Info: Processing started: Tue Sep 16 15:00:04 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off fourbitincrement -c fourbitincrement " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off fourbitincrement -c fourbitincrement" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" {  } {  } 0 0 "Writing out detailed assembly data for power analysis" 0 0 "" 0 0}
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" {  } {  } 0 0 "Assembler is generating device programming files" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "176 " "Info: Peak virtual memory: 176 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Sep 16 15:00:08 2008 " "Info: Processing ended: Tue Sep 16 15:00:08 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Info: Total CPU time (on all processors): 00:00:03" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Sep 16 15:00:08 2008 " "Info: Processing started: Tue Sep 16 15:00:08 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off fourbitincrement -c fourbitincrement --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off fourbitincrement -c fourbitincrement --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "a\[0\] y\[2\] 12.677 ns Longest " "Info: Longest tpd from source pin \"a\[0\]\" to destination pin \"y\[2\]\" is 12.677 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.843 ns) 0.843 ns a\[0\] 1 PIN PIN_W8 4 " "Info: 1: + IC(0.000 ns) + CELL(0.843 ns) = 0.843 ns; Loc. = PIN_W8; Fanout = 4; PIN Node = 'a\[0\]'" {  } { { "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" "" { a[0] } "NODE_NAME" } } { "fourbitincrement.vhd" "" { Text "C:/fourbitincrement/fourbitincrement.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.155 ns) + CELL(0.521 ns) 7.519 ns onebitincrement:u3\|s~0 2 COMB LCCOMB_X13_Y20_N26 1 " "Info: 2: + IC(6.155 ns) + CELL(0.521 ns) = 7.519 ns; Loc. = LCCOMB_X13_Y20_N26; Fanout = 1; COMB Node = 'onebitincrement:u3\|s~0'" {  } { { "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" "6.676 ns" { a[0] onebitincrement:u3|s~0 } "NODE_NAME" } } { "onebitincrement.vhd" "" { Text "C:/fourbitincrement/onebitincrement.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.182 ns) + CELL(2.976 ns) 12.677 ns y\[2\] 3 PIN PIN_U9 0 " "Info: 3: + IC(2.182 ns) + CELL(2.976 ns) = 12.677 ns; Loc. = PIN_U9; Fanout = 0; PIN Node = 'y\[2\]'" {  } { { "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" "5.158 ns" { onebitincrement:u3|s~0 y[2] } "NODE_NAME" } } { "fourbitincrement.vhd" "" { Text "C:/fourbitincrement/fourbitincrement.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.340 ns ( 34.24 % ) " "Info: Total cell delay = 4.340 ns ( 34.24 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.337 ns ( 65.76 % ) " "Info: Total interconnect delay = 8.337 ns ( 65.76 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/eda/altera/v80/quartus/bin/TimingClosureFloorplan.fld" "" "12.677 ns" { a[0] onebitincrement:u3|s~0 y[2] } "NODE_NAME" } } { "c:/eda/altera/v80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/eda/altera/v80/quartus/bin/Technology_Viewer.qrui" "12.677 ns" { a[0] {} a[0]~combout {} onebitincrement:u3|s~0 {} y[2] {} } { 0.000ns 0.000ns 6.155ns 2.182ns } { 0.000ns 0.843ns 0.521ns 2.976ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "127 " "Info: Peak virtual memory: 127 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Sep 16 15:00:09 2008 " "Info: Processing ended: Tue Sep 16 15:00:09 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 8 s " "Info: Quartus II Full Compilation was successful. 0 errors, 8 warnings" {  } {  } 0 0 "Quartus II %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}