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📄 prev_cmp_lab7.qmsg

📁 用VHDL编译的源代码
💻 QMSG
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "bin2led3 bin2led3:u5 " "Info: Elaborating entity \"bin2led3\" for hierarchy \"bin2led3:u5\"" {  } { { "lab7.vhd" "u5" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 55 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "heartbeat:u1\|d3_reg\[0\] heartbeat:u1\|d0_reg\[0\] " "Info (13350): Duplicate register \"heartbeat:u1\|d3_reg\[0\]\" merged to single register \"heartbeat:u1\|d0_reg\[0\]\"" {  } { { "heartbeat.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/heartbeat.vhd" 24 -1 0 } }  } 0 13350 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "heartbeat:u1\|d1_reg\[0\] heartbeat:u1\|d0_reg\[0\] " "Info (13350): Duplicate register \"heartbeat:u1\|d1_reg\[0\]\" merged to single register \"heartbeat:u1\|d0_reg\[0\]\"" {  } { { "heartbeat.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/heartbeat.vhd" 24 -1 0 } }  } 0 13350 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "heartbeat:u1\|d2_reg\[0\] heartbeat:u1\|d0_reg\[0\] " "Info (13350): Duplicate register \"heartbeat:u1\|d2_reg\[0\]\" merged to single register \"heartbeat:u1\|d0_reg\[0\]\"" {  } { { "heartbeat.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/heartbeat.vhd" 24 -1 0 } }  } 0 13350 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "heartbeat:u1\|d2_reg\[1\] heartbeat:u1\|d0_reg\[1\] " "Info (13350): Duplicate register \"heartbeat:u1\|d2_reg\[1\]\" merged to single register \"heartbeat:u1\|d0_reg\[1\]\"" {  } { { "heartbeat.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/heartbeat.vhd" 24 -1 0 } }  } 0 13350 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "heartbeat:u1\|d3_reg\[1\] heartbeat:u1\|d0_reg\[1\] " "Info (13350): Duplicate register \"heartbeat:u1\|d3_reg\[1\]\" merged to single register \"heartbeat:u1\|d0_reg\[1\]\"" {  } { { "heartbeat.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/heartbeat.vhd" 24 -1 0 } }  } 0 13350 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "heartbeat:u1\|d1_reg\[1\] heartbeat:u1\|d0_reg\[1\] " "Info (13350): Duplicate register \"heartbeat:u1\|d1_reg\[1\]\" merged to single register \"heartbeat:u1\|d0_reg\[1\]\"" {  } { { "heartbeat.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/heartbeat.vhd" 24 -1 0 } }  } 0 13350 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "ssega\[0\] VCC " "Warning (13410): Pin \"ssega\[0\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssega\[3\] VCC " "Warning (13410): Pin \"ssega\[3\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssega\[4\] VCC " "Warning (13410): Pin \"ssega\[4\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssega\[5\] VCC " "Warning (13410): Pin \"ssega\[5\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssega\[6\] VCC " "Warning (13410): Pin \"ssega\[6\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegb\[0\] VCC " "Warning (13410): Pin \"ssegb\[0\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegb\[3\] VCC " "Warning (13410): Pin \"ssegb\[3\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegb\[6\] VCC " "Warning (13410): Pin \"ssegb\[6\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegc\[0\] VCC " "Warning (13410): Pin \"ssegc\[0\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegc\[3\] VCC " "Warning (13410): Pin \"ssegc\[3\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegc\[6\] VCC " "Warning (13410): Pin \"ssegc\[6\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegd\[0\] VCC " "Warning (13410): Pin \"ssegd\[0\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegd\[1\] VCC " "Warning (13410): Pin \"ssegd\[1\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegd\[2\] VCC " "Warning (13410): Pin \"ssegd\[2\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegd\[3\] VCC " "Warning (13410): Pin \"ssegd\[3\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ssegd\[6\] VCC " "Warning (13410): Pin \"ssegd\[6\]\" is stuck at VCC" {  } { { "lab7.vhd" "" { Text "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/lab7.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "105 " "Info: Implemented 105 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "1 " "Info: Implemented 1 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "28 " "Info: Implemented 28 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_LCELLS" "76 " "Info: Implemented 76 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 22 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 22 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "179 " "Info: Peak virtual memory: 179 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Oct 29 16:34:40 2008 " "Info: Processing ended: Wed Oct 29 16:34:40 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:04 " "Info: Total CPU time (on all processors): 00:00:04" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Web Edition " "Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Oct 29 16:34:42 2008 " "Info: Processing started: Wed Oct 29 16:34:42 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off lab7 -c lab7 " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off lab7 -c lab7" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "lab7 EP2C20F484C7 " "Info: Selected device EP2C20F484C7 for design \"lab7\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 0}
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock incremental compilation " "Warning: Feature LogicLock incremental compilation is not available with your current license" {  } {  } 0 0 "Feature %1!s! is not available with your current license" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C15AF484C7 " "Info: Device EP2C15AF484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C35F484C7 " "Info: Device EP2C35F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F484C7 " "Info: Device EP2C50F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 0}

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