heartbeat.sim.rpt

用VHDL编译的源代码

; |heartbeat|Add4~51       ; |heartbeat|Add4~51       ; cout             ;
; |heartbeat|Add4~52       ; |heartbeat|Add4~52       ; combout          ;
; |heartbeat|d0_reg[0]     ; |heartbeat|d0_reg[0]     ; regout           ;
; |heartbeat|d0_reg[1]     ; |heartbeat|d0_reg[1]     ; regout           ;
; |heartbeat|ms_reg[2]     ; |heartbeat|ms_reg[2]     ; regout           ;
; |heartbeat|ms_reg[0]     ; |heartbeat|ms_reg[0]     ; regout           ;
; |heartbeat|ms_reg[1]     ; |heartbeat|ms_reg[1]     ; regout           ;
; |heartbeat|Equal0~52     ; |heartbeat|Equal0~52     ; combout          ;
; |heartbeat|d0_next[2]~92 ; |heartbeat|d0_next[2]~92 ; combout          ;
; |heartbeat|d0_next[2]~93 ; |heartbeat|d0_next[2]~93 ; combout          ;
; |heartbeat|d1_next[2]~80 ; |heartbeat|d1_next[2]~80 ; combout          ;
; |heartbeat|d2_next[2]~80 ; |heartbeat|d2_next[2]~80 ; combout          ;
; |heartbeat|d3_next[2]~80 ; |heartbeat|d3_next[2]~80 ; combout          ;
; |heartbeat|ms_next[2]~36 ; |heartbeat|ms_next[2]~36 ; combout          ;
; |heartbeat|ms_next[0]~37 ; |heartbeat|ms_next[0]~37 ; combout          ;
; |heartbeat|ms_reg[1]~17  ; |heartbeat|ms_reg[1]~17  ; combout          ;
; |heartbeat|d0[0]         ; |heartbeat|d0[0]         ; padio            ;
; |heartbeat|d0[1]         ; |heartbeat|d0[1]         ; padio            ;
; |heartbeat|d1[0]         ; |heartbeat|d1[0]         ; padio            ;
; |heartbeat|d1[1]         ; |heartbeat|d1[1]         ; padio            ;
; |heartbeat|d2[0]         ; |heartbeat|d2[0]         ; padio            ;
; |heartbeat|d2[1]         ; |heartbeat|d2[1]         ; padio            ;
; |heartbeat|d3[0]         ; |heartbeat|d3[0]         ; padio            ;
; |heartbeat|d3[1]         ; |heartbeat|d3[1]         ; padio            ;
; |heartbeat|clk           ; |heartbeat|clk~corein    ; combout          ;
; |heartbeat|clk~clkctrl   ; |heartbeat|clk~clkctrl   ; outclk           ;
+--------------------------+--------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+----------------------------------------------------------------+
; Missing 1-Value Coverage                                       ;
+----------------------+----------------------+------------------+
; Node Name            ; Output Port Name     ; Output Port Type ;
+----------------------+----------------------+------------------+
; |heartbeat|Add2~52   ; |heartbeat|Add2~53   ; cout             ;
; |heartbeat|Add2~54   ; |heartbeat|Add2~54   ; combout          ;
; |heartbeat|Add1~52   ; |heartbeat|Add1~53   ; cout             ;
; |heartbeat|Add1~54   ; |heartbeat|Add1~54   ; combout          ;
; |heartbeat|Add3~52   ; |heartbeat|Add3~53   ; cout             ;
; |heartbeat|Add3~54   ; |heartbeat|Add3~54   ; combout          ;
; |heartbeat|Add4~52   ; |heartbeat|Add4~53   ; cout             ;
; |heartbeat|Add4~54   ; |heartbeat|Add4~54   ; combout          ;
; |heartbeat|d0_reg[2] ; |heartbeat|d0_reg[2] ; regout           ;
; |heartbeat|d0_reg[3] ; |heartbeat|d0_reg[3] ; regout           ;
; |heartbeat|d1_reg[2] ; |heartbeat|d1_reg[2] ; regout           ;
; |heartbeat|d1_reg[3] ; |heartbeat|d1_reg[3] ; regout           ;
; |heartbeat|d2_reg[2] ; |heartbeat|d2_reg[2] ; regout           ;
; |heartbeat|d2_reg[3] ; |heartbeat|d2_reg[3] ; regout           ;
; |heartbeat|d3_reg[2] ; |heartbeat|d3_reg[2] ; regout           ;
; |heartbeat|d3_reg[3] ; |heartbeat|d3_reg[3] ; regout           ;
; |heartbeat|d0[2]     ; |heartbeat|d0[2]     ; padio            ;
; |heartbeat|d0[3]     ; |heartbeat|d0[3]     ; padio            ;
; |heartbeat|d1[2]     ; |heartbeat|d1[2]     ; padio            ;
; |heartbeat|d1[3]     ; |heartbeat|d1[3]     ; padio            ;
; |heartbeat|d2[2]     ; |heartbeat|d2[2]     ; padio            ;
; |heartbeat|d2[3]     ; |heartbeat|d2[3]     ; padio            ;
; |heartbeat|d3[2]     ; |heartbeat|d3[2]     ; padio            ;
; |heartbeat|d3[3]     ; |heartbeat|d3[3]     ; padio            ;
+----------------------+----------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------+
; Missing 0-Value Coverage                                       ;
+----------------------+----------------------+------------------+
; Node Name            ; Output Port Name     ; Output Port Type ;
+----------------------+----------------------+------------------+
; |heartbeat|Add2~52   ; |heartbeat|Add2~53   ; cout             ;
; |heartbeat|Add2~54   ; |heartbeat|Add2~54   ; combout          ;
; |heartbeat|Add1~52   ; |heartbeat|Add1~53   ; cout             ;
; |heartbeat|Add1~54   ; |heartbeat|Add1~54   ; combout          ;
; |heartbeat|Add3~52   ; |heartbeat|Add3~53   ; cout             ;
; |heartbeat|Add3~54   ; |heartbeat|Add3~54   ; combout          ;
; |heartbeat|Add4~52   ; |heartbeat|Add4~53   ; cout             ;
; |heartbeat|Add4~54   ; |heartbeat|Add4~54   ; combout          ;
; |heartbeat|d0_reg[2] ; |heartbeat|d0_reg[2] ; regout           ;
; |heartbeat|d0_reg[3] ; |heartbeat|d0_reg[3] ; regout           ;
; |heartbeat|d1_reg[2] ; |heartbeat|d1_reg[2] ; regout           ;
; |heartbeat|d1_reg[3] ; |heartbeat|d1_reg[3] ; regout           ;
; |heartbeat|d2_reg[2] ; |heartbeat|d2_reg[2] ; regout           ;
; |heartbeat|d2_reg[3] ; |heartbeat|d2_reg[3] ; regout           ;
; |heartbeat|d3_reg[2] ; |heartbeat|d3_reg[2] ; regout           ;
; |heartbeat|d3_reg[3] ; |heartbeat|d3_reg[3] ; regout           ;
; |heartbeat|d0[2]     ; |heartbeat|d0[2]     ; padio            ;
; |heartbeat|d0[3]     ; |heartbeat|d0[3]     ; padio            ;
; |heartbeat|d1[2]     ; |heartbeat|d1[2]     ; padio            ;
; |heartbeat|d1[3]     ; |heartbeat|d1[3]     ; padio            ;
; |heartbeat|d2[2]     ; |heartbeat|d2[2]     ; padio            ;
; |heartbeat|d2[3]     ; |heartbeat|d2[3]     ; padio            ;
; |heartbeat|d3[2]     ; |heartbeat|d3[2]     ; padio            ;
; |heartbeat|d3[3]     ; |heartbeat|d3[3]     ; padio            ;
+----------------------+----------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Web Edition
    Info: Processing started: Tue Oct 21 02:17:00 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off heartbeat -c heartbeat
Info: Using vector source file "H:/EEC 587 Rapid Digital System Prototyping/VHDL/lab7/heartbeat/heartbeat.vwf"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      61.29 %
Info: Number of transitions in simulation is 1716
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 110 megabytes
    Info: Processing ended: Tue Oct 21 02:17:03 2008
    Info: Elapsed time: 00:00:03
    Info: Total CPU time (on all processors): 00:00:01