📄 median_v.sdo
字号:
// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files from any of the foregoing
// (including device programming or simulation files), and any
// associated documentation or information are expressly subject
// to the terms and conditions of the Altera Program License
// Subscription Agreement, Altera MegaCore Function License
// Agreement, or other applicable license agreement, including,
// without limitation, that your use is for the sole purpose of
// programming logic devices manufactured by Altera and sold by
// Altera or its authorized distributors. Please refer to the
// applicable agreement for further details.
//
// Device: Altera EP2C20F484C7 Package FBGA484
//
//
// This SDF file should be used for ModelSim (Verilog) only
//
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "median")
(DATE "08/17/2008 16:02:10")
(VENDOR "Altera")
(PROGRAM "Quartus II")
(VERSION "Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version")
(DIVIDER .)
(TIMESCALE 1 ps)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE img_x\[6\])
(DELAY
(ABSOLUTE
(PORT clk (1601:1601:1601) (1601:1601:1601))
(PORT datain (96:96:96) (96:96:96))
(PORT aclr (1605:1605:1605) (1605:1605:1605))
(PORT sclr (1085:1085:1085) (1085:1085:1085))
(PORT ena (1968:1968:1968) (1968:1968:1968))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
(IOPATH (posedge aclr) regout (243:243:243) (243:243:243))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD sclr (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE img_x\[6\]\~905)
(DELAY
(ABSOLUTE
(PORT dataa (393:393:393) (393:393:393))
(IOPATH dataa combout (542:542:542) (542:542:542))
(IOPATH dataa cout (517:517:517) (517:517:517))
(IOPATH datad combout (178:178:178) (178:178:178))
(IOPATH cin combout (458:458:458) (458:458:458))
(IOPATH cin cout (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE q_min\[0\])
(DELAY
(ABSOLUTE
(PORT clk (1598:1598:1598) (1598:1598:1598))
(PORT datain (96:96:96) (96:96:96))
(PORT sdata (1569:1569:1569) (1569:1569:1569))
(PORT sload (1065:1065:1065) (1065:1065:1065))
(PORT ena (1626:1626:1626) (1626:1626:1626))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD sload (posedge clk) (286:286:286))
(HOLD sdata (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE q_min\[5\])
(DELAY
(ABSOLUTE
(PORT clk (1598:1598:1598) (1598:1598:1598))
(PORT datain (96:96:96) (96:96:96))
(PORT sdata (1328:1328:1328) (1328:1328:1328))
(PORT sload (1065:1065:1065) (1065:1065:1065))
(PORT ena (1626:1626:1626) (1626:1626:1626))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD sload (posedge clk) (286:286:286))
(HOLD sdata (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE min\[4\])
(DELAY
(ABSOLUTE
(PORT clk (1594:1594:1594) (1594:1594:1594))
(PORT datain (96:96:96) (96:96:96))
(PORT sdata (1915:1915:1915) (1915:1915:1915))
(PORT sload (1101:1101:1101) (1101:1101:1101))
(PORT ena (1273:1273:1273) (1273:1273:1273))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD sload (posedge clk) (286:286:286))
(HOLD sdata (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE min\[3\])
(DELAY
(ABSOLUTE
(PORT clk (1594:1594:1594) (1594:1594:1594))
(PORT datain (96:96:96) (96:96:96))
(PORT sdata (1386:1386:1386) (1386:1386:1386))
(PORT sload (1101:1101:1101) (1101:1101:1101))
(PORT ena (1273:1273:1273) (1273:1273:1273))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD sload (posedge clk) (286:286:286))
(HOLD sdata (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE q_min\[2\])
(DELAY
(ABSOLUTE
(PORT clk (1598:1598:1598) (1598:1598:1598))
(PORT datain (96:96:96) (96:96:96))
(PORT sdata (2285:2285:2285) (2285:2285:2285))
(PORT sload (1065:1065:1065) (1065:1065:1065))
(PORT ena (1626:1626:1626) (1626:1626:1626))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD sload (posedge clk) (286:286:286))
(HOLD sdata (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE q_min\[1\])
(DELAY
(ABSOLUTE
(PORT clk (1598:1598:1598) (1598:1598:1598))
(PORT datain (96:96:96) (96:96:96))
(PORT sdata (1326:1326:1326) (1326:1326:1326))
(PORT sload (1065:1065:1065) (1065:1065:1065))
(PORT ena (1626:1626:1626) (1626:1626:1626))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD sload (posedge clk) (286:286:286))
(HOLD sdata (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~105)
(DELAY
(ABSOLUTE
(PORT dataa (919:919:919) (919:919:919))
(PORT datab (877:877:877) (877:877:877))
(IOPATH dataa cout (517:517:517) (517:517:517))
(IOPATH datab cout (495:495:495) (495:495:495))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~107)
(DELAY
(ABSOLUTE
(PORT dataa (1157:1157:1157) (1157:1157:1157))
(PORT datab (885:885:885) (885:885:885))
(IOPATH dataa cout (517:517:517) (517:517:517))
(IOPATH datab cout (495:495:495) (495:495:495))
(IOPATH cin cout (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~109)
(DELAY
(ABSOLUTE
(PORT dataa (1529:1529:1529) (1529:1529:1529))
(PORT datab (887:887:887) (887:887:887))
(IOPATH dataa cout (517:517:517) (517:517:517))
(IOPATH datab cout (495:495:495) (495:495:495))
(IOPATH cin cout (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~111)
(DELAY
(ABSOLUTE
(PORT dataa (1672:1672:1672) (1672:1672:1672))
(PORT datab (868:868:868) (868:868:868))
(IOPATH dataa cout (517:517:517) (517:517:517))
(IOPATH datab cout (495:495:495) (495:495:495))
(IOPATH cin cout (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~113)
(DELAY
(ABSOLUTE
(PORT dataa (1177:1177:1177) (1177:1177:1177))
(PORT datab (1491:1491:1491) (1491:1491:1491))
(IOPATH dataa cout (517:517:517) (517:517:517))
(IOPATH datab cout (495:495:495) (495:495:495))
(IOPATH cin cout (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~115)
(DELAY
(ABSOLUTE
(PORT dataa (892:892:892) (892:892:892))
(PORT datab (1872:1872:1872) (1872:1872:1872))
(IOPATH dataa cout (517:517:517) (517:517:517))
(IOPATH datab cout (495:495:495) (495:495:495))
(IOPATH cin cout (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~117)
(DELAY
(ABSOLUTE
(PORT dataa (1880:1880:1880) (1880:1880:1880))
(PORT datab (1152:1152:1152) (1152:1152:1152))
(IOPATH dataa cout (620:620:620) (620:620:620))
(IOPATH datab cout (596:596:596) (596:596:596))
(IOPATH cin cout (174:174:174) (174:174:174))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_comb")
(INSTANCE LessThan28\~118)
(DELAY
(ABSOLUTE
(PORT dataa (889:889:889) (889:889:889))
(PORT datab (1245:1245:1245) (1245:1245:1245))
(IOPATH dataa combout (544:544:544) (544:544:544))
(IOPATH datab combout (521:521:521) (521:521:521))
(IOPATH cin combout (458:458:458) (458:458:458))
)
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[3\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[2\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[0\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[1\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[4\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[5\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[6\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
)
)
(TIMINGCHECK
(HOLD datain (posedge clk) (286:286:286))
(HOLD ena (posedge clk) (286:286:286))
)
)
(CELL
(CELLTYPE "cycloneii_lcell_ff")
(INSTANCE d2\[7\])
(DELAY
(ABSOLUTE
(PORT clk (1592:1592:1592) (1592:1592:1592))
(PORT datain (96:96:96) (96:96:96))
(PORT ena (1583:1583:1583) (1583:1583:1583))
(IOPATH (posedge clk) regout (277:277:277) (277:277:277))
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -