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📄 reed_sol.v

📁 本電子檔為 verilog cookbook,包含了通訊,影像,DSP等重要常用之verilog編碼,可作為工程師與初學者的參考手冊
💻 V
📖 第 1 页 / 共 5 页
字号:
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[2]^i[3]^i[4];
  assign o[1] = i[1]^i[3]^i[4]^i[5];
  assign o[2] = i[0]^i[3]^i[5]^i[6];
  assign o[3] = i[1]^i[2]^i[3]^i[6]^i[7];
  assign o[4] = i[0]^i[7];
  assign o[5] = i[0]^i[1];
  assign o[6] = i[0]^i[1]^i[2];
  assign o[7] = i[1]^i[2]^i[3];
endmodule

module gf_mult_by_76 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[2]^i[3]^i[4]^i[7];
  assign o[1] = i[0]^i[3]^i[4]^i[5];
  assign o[2] = i[0]^i[1]^i[2]^i[3]^i[5]^i[6]^i[7];
  assign o[3] = i[1]^i[6];
  assign o[4] = i[0]^i[3]^i[4];
  assign o[5] = i[0]^i[1]^i[4]^i[5];
  assign o[6] = i[0]^i[1]^i[2]^i[5]^i[6];
  assign o[7] = i[1]^i[2]^i[3]^i[6]^i[7];
endmodule

module gf_mult_by_77 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[2]^i[3]^i[4]^i[7];
  assign o[1] = i[0]^i[1]^i[3]^i[4]^i[5];
  assign o[2] = i[0]^i[1]^i[3]^i[5]^i[6]^i[7];
  assign o[3] = i[1]^i[3]^i[6];
  assign o[4] = i[0]^i[3];
  assign o[5] = i[0]^i[1]^i[4];
  assign o[6] = i[0]^i[1]^i[2]^i[5];
  assign o[7] = i[1]^i[2]^i[3]^i[6];
endmodule

module gf_mult_by_78 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[2]^i[3]^i[4]^i[5]^i[6];
  assign o[1] = i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[2] = i[2]^i[3]^i[7];
  assign o[3] = i[0]^i[2]^i[5]^i[6];
  assign o[4] = i[0]^i[1]^i[2]^i[4]^i[5]^i[7];
  assign o[5] = i[0]^i[1]^i[2]^i[3]^i[5]^i[6];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[4]^i[6]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4]^i[5]^i[7];
endmodule

module gf_mult_by_79 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[2]^i[3]^i[4]^i[5]^i[6];
  assign o[1] = i[1]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[2] = i[3]^i[7];
  assign o[3] = i[0]^i[2]^i[3]^i[5]^i[6];
  assign o[4] = i[0]^i[1]^i[2]^i[5]^i[7];
  assign o[5] = i[0]^i[1]^i[2]^i[3]^i[6];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[4]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4]^i[5];
endmodule

module gf_mult_by_7a (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[1] = i[0]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[2] = i[1]^i[2]^i[3];
  assign o[3] = i[0]^i[5]^i[6]^i[7];
  assign o[4] = i[0]^i[1]^i[2]^i[3]^i[4]^i[5];
  assign o[5] = i[0]^i[1]^i[2]^i[3]^i[4]^i[5]^i[6];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
endmodule

module gf_mult_by_7b (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[1] = i[0]^i[1]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[2] = i[1]^i[3];
  assign o[3] = i[0]^i[3]^i[5]^i[6]^i[7];
  assign o[4] = i[0]^i[1]^i[2]^i[3]^i[5];
  assign o[5] = i[0]^i[1]^i[2]^i[3]^i[4]^i[6];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[4]^i[5]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4]^i[5]^i[6];
endmodule

module gf_mult_by_7c (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[2]^i[3]^i[4]^i[5];
  assign o[1] = i[3]^i[4]^i[5]^i[6];
  assign o[2] = i[0]^i[2]^i[3]^i[6]^i[7];
  assign o[3] = i[0]^i[1]^i[2]^i[5]^i[7];
  assign o[4] = i[0]^i[1]^i[4]^i[5]^i[6];
  assign o[5] = i[0]^i[1]^i[2]^i[5]^i[6]^i[7];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[6]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4]^i[7];
endmodule

module gf_mult_by_7d (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[2]^i[3]^i[4]^i[5];
  assign o[1] = i[1]^i[3]^i[4]^i[5]^i[6];
  assign o[2] = i[0]^i[3]^i[6]^i[7];
  assign o[3] = i[0]^i[1]^i[2]^i[3]^i[5]^i[7];
  assign o[4] = i[0]^i[1]^i[5]^i[6];
  assign o[5] = i[0]^i[1]^i[2]^i[6]^i[7];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4];
endmodule

module gf_mult_by_7e (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[2]^i[3]^i[4]^i[5]^i[7];
  assign o[1] = i[0]^i[3]^i[4]^i[5]^i[6];
  assign o[2] = i[0]^i[1]^i[2]^i[3]^i[6];
  assign o[3] = i[0]^i[1]^i[5];
  assign o[4] = i[0]^i[1]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[5] = i[0]^i[1]^i[2]^i[4]^i[5]^i[6]^i[7];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[5]^i[6]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4]^i[6]^i[7];
endmodule

module gf_mult_by_7f (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[2]^i[3]^i[4]^i[5]^i[7];
  assign o[1] = i[0]^i[1]^i[3]^i[4]^i[5]^i[6];
  assign o[2] = i[0]^i[1]^i[3]^i[6];
  assign o[3] = i[0]^i[1]^i[3]^i[5];
  assign o[4] = i[0]^i[1]^i[3]^i[5]^i[6]^i[7];
  assign o[5] = i[0]^i[1]^i[2]^i[4]^i[6]^i[7];
  assign o[6] = i[0]^i[1]^i[2]^i[3]^i[5]^i[7];
  assign o[7] = i[1]^i[2]^i[3]^i[4]^i[6];
endmodule

module gf_mult_by_80 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[5]^i[6]^i[7];
  assign o[1] = i[2]^i[6]^i[7];
  assign o[2] = i[1]^i[3]^i[5]^i[6];
  assign o[3] = i[1]^i[2]^i[4]^i[5];
  assign o[4] = i[1]^i[2]^i[3]^i[7];
  assign o[5] = i[2]^i[3]^i[4];
  assign o[6] = i[3]^i[4]^i[5];
  assign o[7] = i[0]^i[4]^i[5]^i[6];
endmodule

module gf_mult_by_81 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[5]^i[6]^i[7];
  assign o[1] = i[1]^i[2]^i[6]^i[7];
  assign o[2] = i[1]^i[2]^i[3]^i[5]^i[6];
  assign o[3] = i[1]^i[2]^i[3]^i[4]^i[5];
  assign o[4] = i[1]^i[2]^i[3]^i[4]^i[7];
  assign o[5] = i[2]^i[3]^i[4]^i[5];
  assign o[6] = i[3]^i[4]^i[5]^i[6];
  assign o[7] = i[0]^i[4]^i[5]^i[6]^i[7];
endmodule

module gf_mult_by_82 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[5]^i[6];
  assign o[1] = i[0]^i[2]^i[6]^i[7];
  assign o[2] = i[3]^i[5]^i[6]^i[7];
  assign o[3] = i[1]^i[4]^i[5]^i[7];
  assign o[4] = i[1]^i[2];
  assign o[5] = i[2]^i[3];
  assign o[6] = i[3]^i[4];
  assign o[7] = i[0]^i[4]^i[5];
endmodule

module gf_mult_by_83 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[5]^i[6];
  assign o[1] = i[0]^i[1]^i[2]^i[6]^i[7];
  assign o[2] = i[2]^i[3]^i[5]^i[6]^i[7];
  assign o[3] = i[1]^i[3]^i[4]^i[5]^i[7];
  assign o[4] = i[1]^i[2]^i[4];
  assign o[5] = i[2]^i[3]^i[5];
  assign o[6] = i[3]^i[4]^i[6];
  assign o[7] = i[0]^i[4]^i[5]^i[7];
endmodule

module gf_mult_by_84 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[5]^i[7];
  assign o[1] = i[2]^i[6];
  assign o[2] = i[0]^i[1]^i[3]^i[5];
  assign o[3] = i[2]^i[4]^i[5]^i[6]^i[7];
  assign o[4] = i[1]^i[3]^i[6];
  assign o[5] = i[2]^i[4]^i[7];
  assign o[6] = i[3]^i[5];
  assign o[7] = i[0]^i[4]^i[6];
endmodule

module gf_mult_by_85 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[5]^i[7];
  assign o[1] = i[1]^i[2]^i[6];
  assign o[2] = i[0]^i[1]^i[2]^i[3]^i[5];
  assign o[3] = i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[4] = i[1]^i[3]^i[4]^i[6];
  assign o[5] = i[2]^i[4]^i[5]^i[7];
  assign o[6] = i[3]^i[5]^i[6];
  assign o[7] = i[0]^i[4]^i[6]^i[7];
endmodule

module gf_mult_by_86 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[5];
  assign o[1] = i[0]^i[2]^i[6];
  assign o[2] = i[0]^i[3]^i[5]^i[7];
  assign o[3] = i[4]^i[5]^i[6];
  assign o[4] = i[1]^i[6]^i[7];
  assign o[5] = i[2]^i[7];
  assign o[6] = i[3];
  assign o[7] = i[0]^i[4];
endmodule

module gf_mult_by_87 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[5];
  assign o[1] = i[0]^i[1]^i[2]^i[6];
  assign o[2] = i[0]^i[2]^i[3]^i[5]^i[7];
  assign o[3] = i[3]^i[4]^i[5]^i[6];
  assign o[4] = i[1]^i[4]^i[6]^i[7];
  assign o[5] = i[2]^i[5]^i[7];
  assign o[6] = i[3]^i[6];
  assign o[7] = i[0]^i[4]^i[7];
endmodule

module gf_mult_by_88 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[6]^i[7];
  assign o[1] = i[2]^i[7];
  assign o[2] = i[1]^i[3]^i[6]^i[7];
  assign o[3] = i[0]^i[1]^i[2]^i[4]^i[6];
  assign o[4] = i[2]^i[3]^i[5]^i[6];
  assign o[5] = i[3]^i[4]^i[6]^i[7];
  assign o[6] = i[4]^i[5]^i[7];
  assign o[7] = i[0]^i[5]^i[6];
endmodule

module gf_mult_by_89 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[6]^i[7];
  assign o[1] = i[1]^i[2]^i[7];
  assign o[2] = i[1]^i[2]^i[3]^i[6]^i[7];
  assign o[3] = i[0]^i[1]^i[2]^i[3]^i[4]^i[6];
  assign o[4] = i[2]^i[3]^i[4]^i[5]^i[6];
  assign o[5] = i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[6] = i[4]^i[5]^i[6]^i[7];
  assign o[7] = i[0]^i[5]^i[6]^i[7];
endmodule

module gf_mult_by_8a (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[6];
  assign o[1] = i[0]^i[2]^i[7];
  assign o[2] = i[3]^i[6];
  assign o[3] = i[0]^i[1]^i[4]^i[6]^i[7];
  assign o[4] = i[2]^i[5]^i[6]^i[7];
  assign o[5] = i[3]^i[6]^i[7];
  assign o[6] = i[4]^i[7];
  assign o[7] = i[0]^i[5];
endmodule

module gf_mult_by_8b (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[6];
  assign o[1] = i[0]^i[1]^i[2]^i[7];
  assign o[2] = i[2]^i[3]^i[6];
  assign o[3] = i[0]^i[1]^i[3]^i[4]^i[6]^i[7];
  assign o[4] = i[2]^i[4]^i[5]^i[6]^i[7];
  assign o[5] = i[3]^i[5]^i[6]^i[7];
  assign o[6] = i[4]^i[6]^i[7];
  assign o[7] = i[0]^i[5]^i[7];
endmodule

module gf_mult_by_8c (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[7];
  assign o[1] = i[2];
  assign o[2] = i[0]^i[1]^i[3]^i[7];
  assign o[3] = i[0]^i[2]^i[4]^i[7];
  assign o[4] = i[3]^i[5]^i[7];
  assign o[5] = i[4]^i[6];
  assign o[6] = i[5]^i[7];
  assign o[7] = i[0]^i[6];
endmodule

module gf_mult_by_8d (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[7];
  assign o[1] = i[1]^i[2];
  assign o[2] = i[0]^i[1]^i[2]^i[3]^i[7];
  assign o[3] = i[0]^i[2]^i[3]^i[4]^i[7];
  assign o[4] = i[3]^i[4]^i[5]^i[7];
  assign o[5] = i[4]^i[5]^i[6];
  assign o[6] = i[5]^i[6]^i[7];
  assign o[7] = i[0]^i[6]^i[7];
endmodule

module gf_mult_by_8e (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1];
  assign o[1] = i[0]^i[2];
  assign o[2] = i[0]^i[3];
  assign o[3] = i[0]^i[4];
  assign o[4] = i[5];
  assign o[5] = i[6];
  assign o[6] = i[7];
  assign o[7] = i[0];
endmodule

module gf_mult_by_8f (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1];
  assign o[1] = i[0]^i[1]^i[2];
  assign o[2] = i[0]^i[2]^i[3];
  assign o[3] = i[0]^i[3]^i[4];
  assign o[4] = i[4]^i[5];
  assign o[5] = i[5]^i[6];
  assign o[6] = i[6]^i[7];
  assign o[7] = i[0]^i[7];
endmodule

module gf_mult_by_90 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[4]^i[5]^i[6]^i[7];
  assign o[1] = i[2]^i[5]^i[6]^i[7];
  assign o[2] = i[1]^i[3]^i[4]^i[5];
  assign o[3] = i[1]^i[2]^i[7];
  assign o[4] = i[0]^i[1]^i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[5] = i[1]^i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[6] = i[2]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[7] = i[0]^i[3]^i[4]^i[5]^i[6]^i[7];
endmodule

module gf_mult_by_91 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[4]^i[5]^i[6]^i[7];
  assign o[1] = i[1]^i[2]^i[5]^i[6]^i[7];
  assign o[2] = i[1]^i[2]^i[3]^i[4]^i[5];
  assign o[3] = i[1]^i[2]^i[3]^i[7];
  assign o[4] = i[0]^i[1]^i[2]^i[3]^i[5]^i[6]^i[7];
  assign o[5] = i[1]^i[2]^i[3]^i[4]^i[6]^i[7];
  assign o[6] = i[2]^i[3]^i[4]^i[5]^i[7];
  assign o[7] = i[0]^i[3]^i[4]^i[5]^i[6];
endmodule

module gf_mult_by_92 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[4]^i[5]^i[6];
  assign o[1] = i[0]^i[2]^i[5]^i[6]^i[7];
  assign o[2] = i[3]^i[4]^i[5]^i[7];
  assign o[3] = i[1];
  assign o[4] = i[0]^i[1]^i[2]^i[4]^i[5]^i[6];
  assign o[5] = i[1]^i[2]^i[3]^i[5]^i[6]^i[7];
  assign o[6] = i[2]^i[3]^i[4]^i[6]^i[7];
  assign o[7] = i[0]^i[3]^i[4]^i[5]^i[7];
endmodule

module gf_mult_by_93 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[4]^i[5]^i[6];
  assign o[1] = i[0]^i[1]^i[2]^i[5]^i[6]^i[7];
  assign o[2] = i[2]^i[3]^i[4]^i[5]^i[7];
  assign o[3] = i[1]^i[3];
  assign o[4] = i[0]^i[1]^i[2]^i[5]^i[6];
  assign o[5] = i[1]^i[2]^i[3]^i[6]^i[7];
  assign o[6] = i[2]^i[3]^i[4]^i[7];
  assign o[7] = i[0]^i[3]^i[4]^i[5];
endmodule

module gf_mult_by_94 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[4]^i[5]^i[7];
  assign o[1] = i[2]^i[5]^i[6];
  assign o[2] = i[0]^i[1]^i[3]^i[4]^i[5]^i[6];
  assign o[3] = i[2]^i[6];
  assign o[4] = i[0]^i[1]^i[3]^i[4]^i[5];
  assign o[5] = i[1]^i[2]^i[4]^i[5]^i[6];
  assign o[6] = i[2]^i[3]^i[5]^i[6]^i[7];
  assign o[7] = i[0]^i[3]^i[4]^i[6]^i[7];
endmodule

module gf_mult_by_95 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[4]^i[5]^i[7];
  assign o[1] = i[1]^i[2]^i[5]^i[6];
  assign o[2] = i[0]^i[1]^i[2]^i[3]^i[4]^i[5]^i[6];
  assign o[3] = i[2]^i[3]^i[6];
  assign o[4] = i[0]^i[1]^i[3]^i[5];
  assign o[5] = i[1]^i[2]^i[4]^i[6];
  assign o[6] = i[2]^i[3]^i[5]^i[7];
  assign o[7] = i[0]^i[3]^i[4]^i[6];
endmodule

module gf_mult_by_96 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[1]^i[4]^i[5];
  assign o[1] = i[0]^i[2]^i[5]^i[6];
  assign o[2] = i[0]^i[3]^i[4]^i[5]^i[6]^i[7];
  assign o[3] = i[6]^i[7];
  assign o[4] = i[0]^i[1]^i[4]^i[5]^i[7];
  assign o[5] = i[1]^i[2]^i[5]^i[6];
  assign o[6] = i[2]^i[3]^i[6]^i[7];
  assign o[7] = i[0]^i[3]^i[4]^i[7];
endmodule

module gf_mult_by_97 (i,o);
input [7:0] i;
output [7:0] o;
wire [7:0] o;
  assign o[0] = i[0]^i[1]^i[4]^i[5];
  assign o[1] = i[0]^i[1]^i[2]^i[5]^i[6];
  assign o[2] = i[0]^i[2]^i[3]^i[4]^i[5]^i[6

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