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📄 ddr_sdram.srr

📁 DDR(双速率)SDRAM控制器参考设计verilog代码
💻 SRR
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		Detailed Timing Report for  clock : CLK100_inferred_clock 
		*******************************************
Requested Period 	  5.0 ns
Estimated Period 	  10.6 ns
Worst Slack 	 	 -5.6 ns

Start Points for Paths with Slack Worse than -5.0 ns : 

                                                 Arrival          
Instance     Type     Pin         Net            Time        Slack
------------------------------------------------------------------
RESET_N      Port     RESET_N     RESET_N_in     0.0         -5.6 
==================================================================

End Points for Paths with Slack Worse than -5.0 ns : 

                                                                           Required          
Instance                 Type                 Pin       Net                Time         Slack
---------------------------------------------------------------------------------------------
command1.oe_shift[0]     apex20k_lcell_ff     datab     command1.G_151     4.1          -5.6 
command1.oe_shift[1]     apex20k_lcell_ff     dataa     command1.G_151     4.1          -5.6 
command1.oe1             apex20k_lcell_ff     datab     command1.G_151     4.1          -5.6 
command1.oe_shift[3]     apex20k_lcell_ff     datab     command1.G_151     4.1          -5.6 
command1.oe_shift[2]     apex20k_lcell_ff     dataa     command1.G_151     4.1          -5.6 
command1.oe4             apex20k_lcell_ff     ena       command1.G_151     4.5          -5.2 
command1.oe3             apex20k_lcell_ff     ena       command1.G_151     4.5          -5.2 
=============================================================================================

Clock - CLK100_inferred_clock [rising] : Printing a critical path for every start point reported above 

A Critical Path with worst case slack = -5.6 ns:  

The start and the end point of this path are clocked by the CLK100_inferred_clock [rising]
Instance/Net                                  Pin         Pin     Arrival     Delta     Fan
Name                     Type                 Name        Dir     Time        Delay     Out
-------------------------------------------------------------------------------------------
RESET_N                  Port                 RESET_N     Out     0.0         0.0          
RESET_N_in               Net                                                            1  
RESET_N_in               apex20k_io           padio       In      0.0                      
RESET_N_in               apex20k_io           combout     Out     7.7         7.7          
RESET_N_c                Net                                                            95 
command1.G_151           apex20k_lcell        dataa       In      7.7                      
command1.G_151           apex20k_lcell        combout     Out     9.7         2.0          
command1.G_151           Net                                                            7  
command1.oe_shift[3]     apex20k_lcell_ff     datab       In      9.7                      
===========================================================================================
Setup requirement on this path is 0.9 ns. 


		Detailed Timing Report for  clock : CLK200_inferred_clock 
		*******************************************
Requested Period 	  5.0 ns
Estimated Period 	  8.6 ns
Worst Slack 	 	 -3.6 ns

Start Points for Paths with Slack Worse than -3.0 ns : 

                                                                                Arrival          
Instance                Type                 Pin        Net                     Time        Slack
-------------------------------------------------------------------------------------------------
data_path1.DQOUT[0]     apex20k_lcell_ff     regout     data_path1.DQOUT[0]     3.0         -3.4 
data_path1.DQOUT[1]     apex20k_lcell_ff     regout     data_path1.DQOUT[1]     3.0         -3.4 
data_path1.DQOUT[2]     apex20k_lcell_ff     regout     data_path1.DQOUT[2]     3.0         -3.4 
data_path1.DQOUT[3]     apex20k_lcell_ff     regout     data_path1.DQOUT[3]     3.0         -3.4 
data_path1.DQOUT[4]     apex20k_lcell_ff     regout     data_path1.DQOUT[4]     3.0         -3.4 
data_path1.DQOUT[5]     apex20k_lcell_ff     regout     data_path1.DQOUT[5]     3.0         -3.4 
data_path1.DQOUT[6]     apex20k_lcell_ff     regout     data_path1.DQOUT[6]     3.0         -3.4 
data_path1.DQOUT[7]     apex20k_lcell_ff     regout     data_path1.DQOUT[7]     3.0         -3.4 
data_path1.DQOUT[8]     apex20k_lcell_ff     regout     data_path1.DQOUT[8]     3.0         -3.4 
data_path1.DQOUT[9]     apex20k_lcell_ff     regout     data_path1.DQOUT[9]     3.0         -3.4 
=================================================================================================

End Points for Paths with Slack Worse than -3.0 ns : 

                                                                   Required          
Instance              Type                 Pin       Net           Time         Slack
-------------------------------------------------------------------------------------
data_path1.dq1[0]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[1]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[2]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[3]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[4]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[5]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[6]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[7]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[8]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
data_path1.dq1[9]     apex20k_lcell_ff     datac     RESET_N_c     4.1          -3.6 
=====================================================================================

Clock - CLK200_inferred_clock [rising] : Printing a critical path for every start point reported above 

A Critical Path with worst case slack = -3.4 ns:  

The start point of this path has a clock (CLK200_inferred_clock [rising]) that has an offset of 2.5ns with
respect to the start of the period of the destination clock (CLK200_inferred_clock [falling])
Instance/Net                                 Pin        Pin     Arrival     Delta     Fan
Name                    Type                 Name       Dir     Time        Delay     Out
-----------------------------------------------------------------------------------------
data_path1.DQOUT[0]     apex20k_lcell_ff     regout     Out     3.0         0.5          
data_path1.DQOUT[0]     Net                                                           1  
DQ_tri[0]               apex20k_io           datain     In      3.0                      
DQ_tri[0]               apex20k_io           padio      Out     8.4         5.4          
DQ_tri[0]               Net                                                           2  
DQ[63:0]                Port                 DQ[0]      In      8.4                      
=========================================================================================
This path has no setup requirement

A Critical Path with worst case slack = -3.4 ns:  

The start point of this path has a clock (CLK200_inferred_clock [rising]) that has an offset of 2.5ns with
respect to the start of the period of the destination clock (CLK200_inferred_clock [falling])
Instance/Net                                 Pin        Pin     Arrival     Delta     Fan
Name                    Type                 Name       Dir     Time        Delay     Out
-----------------------------------------------------------------------------------------
data_path1.DQOUT[1]     apex20k_lcell_ff     regout     Out     3.0         0.5          
data_path1.DQOUT[1]     Net                                                           1  
DQ_tri[1]               apex20k_io           datain     In      3.0                      
DQ_tri[1]               apex20k_io           padio      Out     8.4         5.4          
DQ_tri[1]               Net                                                           2  
DQ[63:0]                Port                 DQ[1]      In      8.4                      
=========================================================================================
This path has no setup requirement

A Critical Path with worst case slack = -3.4 ns:  

The start point of this path has a clock (CLK200_inferred_clock [rising]) that has an offset of 2.5ns with
respect to the start of the period of the destination clock (CLK200_inferred_clock [falling])
Instance/Net                                 Pin        Pin     Arrival     Delta     Fan
Name                    Type                 Name       Dir     Time        Delay     Out
-----------------------------------------------------------------------------------------
data_path1.DQOUT[2]     apex20k_lcell_ff     regout     Out     3.0         0.5          
data_path1.DQOUT[2]     Net                                                           1  
DQ_tri[2]               apex20k_io           datain     In      3.0                      
DQ_tri[2]               apex20k_io           padio      Out     8.4         5.4          
DQ_tri[2]               Net                                                           2  
DQ[63:0]                Port                 DQ[2]      In      8.4                      
=========================================================================================
This path has no setup requirement

A Critical Path with worst case slack = -3.4 ns:  

The start point of this path has a clock (CLK200_inferred_clock [rising]) that has an o

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