ddr_sdram.vqm

DDR（双速率）SDRAM控制器参考设计verilog代码

defparam din2_1_.output_mode="reg_only";
defparam din2_1_.packed_mode="false";
defparam din2_1_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_2_ (
	.regout(din2[2]),
	.clk(CLK100),
	.dataa(din1[2]),
	.aclr(RESET_N_i)
);
defparam din2_2_.operation_mode="normal";
defparam din2_2_.output_mode="reg_only";
defparam din2_2_.packed_mode="false";
defparam din2_2_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_3_ (
	.regout(din2[3]),
	.clk(CLK100),
	.dataa(din1[3]),
	.aclr(RESET_N_i)
);
defparam din2_3_.operation_mode="normal";
defparam din2_3_.output_mode="reg_only";
defparam din2_3_.packed_mode="false";
defparam din2_3_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_4_ (
	.regout(din2[4]),
	.clk(CLK100),
	.dataa(din1[4]),
	.aclr(RESET_N_i)
);
defparam din2_4_.operation_mode="normal";
defparam din2_4_.output_mode="reg_only";
defparam din2_4_.packed_mode="false";
defparam din2_4_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_5_ (
	.regout(din2[5]),
	.clk(CLK100),
	.dataa(din1[5]),
	.aclr(RESET_N_i)
);
defparam din2_5_.operation_mode="normal";
defparam din2_5_.output_mode="reg_only";
defparam din2_5_.packed_mode="false";
defparam din2_5_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_6_ (
	.regout(din2[6]),
	.clk(CLK100),
	.dataa(din1[6]),
	.aclr(RESET_N_i)
);
defparam din2_6_.operation_mode="normal";
defparam din2_6_.output_mode="reg_only";
defparam din2_6_.packed_mode="false";
defparam din2_6_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_7_ (
	.regout(din2[7]),
	.clk(CLK100),
	.dataa(din1[7]),
	.aclr(RESET_N_i)
);
defparam din2_7_.operation_mode="normal";
defparam din2_7_.output_mode="reg_only";
defparam din2_7_.packed_mode="false";
defparam din2_7_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_8_ (
	.regout(din2[8]),
	.clk(CLK100),
	.dataa(din1[8]),
	.aclr(RESET_N_i)
);
defparam din2_8_.operation_mode="normal";
defparam din2_8_.output_mode="reg_only";
defparam din2_8_.packed_mode="false";
defparam din2_8_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_9_ (
	.regout(din2[9]),
	.clk(CLK100),
	.dataa(din1[9]),
	.aclr(RESET_N_i)
);
defparam din2_9_.operation_mode="normal";
defparam din2_9_.output_mode="reg_only";
defparam din2_9_.packed_mode="false";
defparam din2_9_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_10_ (
	.regout(din2[10]),
	.clk(CLK100),
	.dataa(din1[10]),
	.aclr(RESET_N_i)
);
defparam din2_10_.operation_mode="normal";
defparam din2_10_.output_mode="reg_only";
defparam din2_10_.packed_mode="false";
defparam din2_10_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_11_ (
	.regout(din2[11]),
	.clk(CLK100),
	.dataa(din1[11]),
	.aclr(RESET_N_i)
);
defparam din2_11_.operation_mode="normal";
defparam din2_11_.output_mode="reg_only";
defparam din2_11_.packed_mode="false";
defparam din2_11_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_12_ (
	.regout(din2[12]),
	.clk(CLK100),
	.dataa(din1[12]),
	.aclr(RESET_N_i)
);
defparam din2_12_.operation_mode="normal";
defparam din2_12_.output_mode="reg_only";
defparam din2_12_.packed_mode="false";
defparam din2_12_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_13_ (
	.regout(din2[13]),
	.clk(CLK100),
	.dataa(din1[13]),
	.aclr(RESET_N_i)
);
defparam din2_13_.operation_mode="normal";
defparam din2_13_.output_mode="reg_only";
defparam din2_13_.packed_mode="false";
defparam din2_13_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_14_ (
	.regout(din2[14]),
	.clk(CLK100),
	.dataa(din1[14]),
	.aclr(RESET_N_i)
);
defparam din2_14_.operation_mode="normal";
defparam din2_14_.output_mode="reg_only";
defparam din2_14_.packed_mode="false";
defparam din2_14_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_15_ (
	.regout(din2[15]),
	.clk(CLK100),
	.dataa(din1[15]),
	.aclr(RESET_N_i)
);
defparam din2_15_.operation_mode="normal";
defparam din2_15_.output_mode="reg_only";
defparam din2_15_.packed_mode="false";
defparam din2_15_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_16_ (
	.regout(din2[16]),
	.clk(CLK100),
	.dataa(din1[16]),
	.aclr(RESET_N_i)
);
defparam din2_16_.operation_mode="normal";
defparam din2_16_.output_mode="reg_only";
defparam din2_16_.packed_mode="false";
defparam din2_16_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_17_ (
	.regout(din2[17]),
	.clk(CLK100),
	.dataa(din1[17]),
	.aclr(RESET_N_i)
);
defparam din2_17_.operation_mode="normal";
defparam din2_17_.output_mode="reg_only";
defparam din2_17_.packed_mode="false";
defparam din2_17_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_18_ (
	.regout(din2[18]),
	.clk(CLK100),
	.dataa(din1[18]),
	.aclr(RESET_N_i)
);
defparam din2_18_.operation_mode="normal";
defparam din2_18_.output_mode="reg_only";
defparam din2_18_.packed_mode="false";
defparam din2_18_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_19_ (
	.regout(din2[19]),
	.clk(CLK100),
	.dataa(din1[19]),
	.aclr(RESET_N_i)
);
defparam din2_19_.operation_mode="normal";
defparam din2_19_.output_mode="reg_only";
defparam din2_19_.packed_mode="false";
defparam din2_19_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_20_ (
	.regout(din2[20]),
	.clk(CLK100),
	.dataa(din1[20]),
	.aclr(RESET_N_i)
);
defparam din2_20_.operation_mode="normal";
defparam din2_20_.output_mode="reg_only";
defparam din2_20_.packed_mode="false";
defparam din2_20_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_21_ (
	.regout(din2[21]),
	.clk(CLK100),
	.dataa(din1[21]),
	.aclr(RESET_N_i)
);
defparam din2_21_.operation_mode="normal";
defparam din2_21_.output_mode="reg_only";
defparam din2_21_.packed_mode="false";
defparam din2_21_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_22_ (
	.regout(din2[22]),
	.clk(CLK100),
	.dataa(din1[22]),
	.aclr(RESET_N_i)
);
defparam din2_22_.operation_mode="normal";
defparam din2_22_.output_mode="reg_only";
defparam din2_22_.packed_mode="false";
defparam din2_22_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_23_ (
	.regout(din2[23]),
	.clk(CLK100),
	.dataa(din1[23]),
	.aclr(RESET_N_i)
);
defparam din2_23_.operation_mode="normal";
defparam din2_23_.output_mode="reg_only";
defparam din2_23_.packed_mode="false";
defparam din2_23_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_24_ (
	.regout(din2[24]),
	.clk(CLK100),
	.dataa(din1[24]),
	.aclr(RESET_N_i)
);
defparam din2_24_.operation_mode="normal";
defparam din2_24_.output_mode="reg_only";
defparam din2_24_.packed_mode="false";
defparam din2_24_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_25_ (
	.regout(din2[25]),
	.clk(CLK100),
	.dataa(din1[25]),
	.aclr(RESET_N_i)
);
defparam din2_25_.operation_mode="normal";
defparam din2_25_.output_mode="reg_only";
defparam din2_25_.packed_mode="false";
defparam din2_25_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_26_ (
	.regout(din2[26]),
	.clk(CLK100),
	.dataa(din1[26]),
	.aclr(RESET_N_i)
);
defparam din2_26_.operation_mode="normal";
defparam din2_26_.output_mode="reg_only";
defparam din2_26_.packed_mode="false";
defparam din2_26_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_27_ (
	.regout(din2[27]),
	.clk(CLK100),
	.dataa(din1[27]),
	.aclr(RESET_N_i)
);
defparam din2_27_.operation_mode="normal";
defparam din2_27_.output_mode="reg_only";
defparam din2_27_.packed_mode="false";
defparam din2_27_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_28_ (
	.regout(din2[28]),
	.clk(CLK100),
	.dataa(din1[28]),
	.aclr(RESET_N_i)
);
defparam din2_28_.operation_mode="normal";
defparam din2_28_.output_mode="reg_only";
defparam din2_28_.packed_mode="false";
defparam din2_28_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_29_ (
	.regout(din2[29]),
	.clk(CLK100),
	.dataa(din1[29]),
	.aclr(RESET_N_i)
);
defparam din2_29_.operation_mode="normal";
defparam din2_29_.output_mode="reg_only";
defparam din2_29_.packed_mode="false";
defparam din2_29_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_30_ (
	.regout(din2[30]),
	.clk(CLK100),
	.dataa(din1[30]),
	.aclr(RESET_N_i)
);
defparam din2_30_.operation_mode="normal";
defparam din2_30_.output_mode="reg_only";
defparam din2_30_.packed_mode="false";
defparam din2_30_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din2_31_ (
	.regout(din2[31]),
	.clk(CLK100),
	.dataa(din1[31]),
	.aclr(RESET_N_i)
);
defparam din2_31_.operation_mode="normal";
defparam din2_31_.output_mode="reg_only";
defparam din2_31_.packed_mode="false";
defparam din2_31_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_0_ (
	.regout(din1x_l2[0]),
	.clk(CLK100),
	.dataa(din1x_l1[0]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_0_.operation_mode="normal";
defparam din1x_l2_0_.output_mode="reg_only";
defparam din1x_l2_0_.packed_mode="false";
defparam din1x_l2_0_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_1_ (
	.regout(din1x_l2[1]),
	.clk(CLK100),
	.dataa(din1x_l1[1]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_1_.operation_mode="normal";
defparam din1x_l2_1_.output_mode="reg_only";
defparam din1x_l2_1_.packed_mode="false";
defparam din1x_l2_1_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_2_ (
	.regout(din1x_l2[2]),
	.clk(CLK100),
	.dataa(din1x_l1[2]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_2_.operation_mode="normal";
defparam din1x_l2_2_.output_mode="reg_only";
defparam din1x_l2_2_.packed_mode="false";
defparam din1x_l2_2_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_3_ (
	.regout(din1x_l2[3]),
	.clk(CLK100),
	.dataa(din1x_l1[3]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_3_.operation_mode="normal";
defparam din1x_l2_3_.output_mode="reg_only";
defparam din1x_l2_3_.packed_mode="false";
defparam din1x_l2_3_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_4_ (
	.regout(din1x_l2[4]),
	.clk(CLK100),
	.dataa(din1x_l1[4]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_4_.operation_mode="normal";
defparam din1x_l2_4_.output_mode="reg_only";
defparam din1x_l2_4_.packed_mode="false";
defparam din1x_l2_4_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_5_ (
	.regout(din1x_l2[5]),
	.clk(CLK100),
	.dataa(din1x_l1[5]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_5_.operation_mode="normal";
defparam din1x_l2_5_.output_mode="reg_only";
defparam din1x_l2_5_.packed_mode="false";
defparam din1x_l2_5_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_6_ (
	.regout(din1x_l2[6]),
	.clk(CLK100),
	.dataa(din1x_l1[6]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_6_.operation_mode="normal";
defparam din1x_l2_6_.output_mode="reg_only";
defparam din1x_l2_6_.packed_mode="false";
defparam din1x_l2_6_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_7_ (
	.regout(din1x_l2[7]),
	.clk(CLK100),
	.dataa(din1x_l1[7]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_7_.operation_mode="normal";
defparam din1x_l2_7_.output_mode="reg_only";
defparam din1x_l2_7_.packed_mode="false";
defparam din1x_l2_7_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_8_ (
	.regout(din1x_l2[8]),
	.clk(CLK100),
	.dataa(din1x_l1[8]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_8_.operation_mode="normal";
defparam din1x_l2_8_.output_mode="reg_only";
defparam din1x_l2_8_.packed_mode="false";
defparam din1x_l2_8_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_9_ (
	.regout(din1x_l2[9]),
	.clk(CLK100),
	.dataa(din1x_l1[9]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_9_.operation_mode="normal";
defparam din1x_l2_9_.output_mode="reg_only";
defparam din1x_l2_9_.packed_mode="false";
defparam din1x_l2_9_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_10_ (
	.regout(din1x_l2[10]),
	.clk(CLK100),
	.dataa(din1x_l1[10]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_10_.operation_mode="normal";
defparam din1x_l2_10_.output_mode="reg_only";
defparam din1x_l2_10_.packed_mode="false";
defparam din1x_l2_10_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_11_ (
	.regout(din1x_l2[11]),
	.clk(CLK100),
	.dataa(din1x_l1[11]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_11_.operation_mode="normal";
defparam din1x_l2_11_.output_mode="reg_only";
defparam din1x_l2_11_.packed_mode="false";
defparam din1x_l2_11_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_12_ (
	.regout(din1x_l2[12]),
	.clk(CLK100),
	.dataa(din1x_l1[12]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_12_.operation_mode="normal";
defparam din1x_l2_12_.output_mode="reg_only";
defparam din1x_l2_12_.packed_mode="false";
defparam din1x_l2_12_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_13_ (
	.regout(din1x_l2[13]),
	.clk(CLK100),
	.dataa(din1x_l1[13]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_13_.operation_mode="normal";
defparam din1x_l2_13_.output_mode="reg_only";
defparam din1x_l2_13_.packed_mode="false";
defparam din1x_l2_13_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_14_ (
	.regout(din1x_l2[14]),
	.clk(CLK100),
	.dataa(din1x_l1[14]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_14_.operation_mode="normal";
defparam din1x_l2_14_.output_mode="reg_only";
defparam din1x_l2_14_.packed_mode="false";
defparam din1x_l2_14_.lut_mask="aaaa";
// @6:109
  apex20k_lcell din1x_l2_15_ (
	.regout(din1x_l2[15]),
	.clk(CLK100),
	.dataa(din1x_l1[15]),
	.aclr(RESET_N_i)
);
defparam din1x_l2_15_.operation_mode="normal";
defparam din1x_l2_15_.output_mode="reg_only";
defparam din1x_l2_15_.packed_mode="false";
defparam din1x_l2_15_.lut_mask="aaaa";
// @6:109
  apex20k_lcell dmin2_0_ (
	.regout(dmin2[0]),
	.clk(CLK100),
	.dataa(dmin1[0]),
	.aclr(RESET_N_i)
);
defparam dmin2_0_.operation_mode="normal";
defparam dmin2_0_.output_mode="reg_only";
defparam dmin2_0_.packed_mode="false";