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📄 array_mult_map.v

📁 64位乘法器源码verilog,经过验证测试
💻 V
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// Xilinx Verilog netlist produced by netgen application (version G.28)// Command      : -intstyle ise -s 6 -pcf array_mult.pcf -ngm array_mult.ngm -w -ofmt verilog -sim array_mult_map.ncd array_mult_map.v // Input file   : array_mult_map.ncd// Output file  : array_mult_map.v// Design name  : array_mult// # of Modules : 1// Xilinx       : C:/Xilinx// Device       : 2s15cs144-6 (PRODUCTION 1.27 2003-12-13)// This verilog netlist is a simulation model and uses simulation // primitives which may not represent the true implementation of the // device, however the netlist is functionally correct and should not // be modified. This file cannot be synthesized and should only be used // with supported simulation tools.`timescale 1 ns/1 psmodule array_mult (p, y, x);  output [7 : 0] p;  input [3 : 0] y;  input [3 : 0] x;  wire x_0_IBUF;  wire x_1_IBUF;  wire x_2_IBUF;  wire x_3_IBUF;  wire y_0_IBUF;  wire y_1_IBUF;  wire y_2_IBUF;  wire y_3_IBUF;  wire p_0_OBUF;  wire p_1_OBUF;  wire p_2_OBUF;  wire p_3_OBUF;  wire p_4_OBUF;  wire p_5_OBUF;  wire p_6_OBUF;  wire p_7_OBUF;  wire p2__n0004;  wire p0__n0003;  wire p1__n0003;  wire p1__n0007;  wire p2__n0003;  wire p0__n0007;  wire GSR = glbl.GSR;  wire GTS = glbl.GTS;  wire \x<0>/IBUF ;  wire \x<1>/IBUF ;  wire \x<2>/IBUF ;  wire \x<3>/IBUF ;  wire \y<0>/IBUF ;  wire \y<1>/IBUF ;  wire \y<2>/IBUF ;  wire \y<3>/IBUF ;  wire \p<0>/ENABLE ;  wire \p<0>/TORGTS ;  wire \p<0>/OUTMUX ;  wire \p<1>/ENABLE ;  wire \p<1>/TORGTS ;  wire \p<1>/OUTMUX ;  wire \p<2>/ENABLE ;  wire \p<2>/TORGTS ;  wire \p<2>/OUTMUX ;  wire \p<3>/ENABLE ;  wire \p<3>/TORGTS ;  wire \p<3>/OUTMUX ;  wire \p<4>/ENABLE ;  wire \p<4>/TORGTS ;  wire \p<4>/OUTMUX ;  wire \p<5>/ENABLE ;  wire \p<5>/TORGTS ;  wire \p<5>/OUTMUX ;  wire \p<6>/ENABLE ;  wire \p<6>/TORGTS ;  wire \p<6>/OUTMUX ;  wire \p<7>/ENABLE ;  wire \p<7>/TORGTS ;  wire \p<7>/OUTMUX ;  wire \c3<1>/FROM ;  wire \c3<1>/GROM ;  wire \p0__n0003/FROM ;  wire \p0__n0003/GROM ;  wire \p_1_OBUF/FROM ;  wire \p_1_OBUF/GROM ;  wire \row1<2>/FROM ;  wire \row1<2>/GROM ;  wire \p_0_OBUF/FROM ;  wire \p_0_OBUF/GROM ;  wire \p2__n0003/FROM ;  wire \p2__n0003/GROM ;  wire \c2<2>/FROM ;  wire \c2<2>/GROM ;  wire \c3<2>/FROM ;  wire \c3<2>/GROM ;  wire \p_5_OBUF/GROM ;  wire \c3<0>/FROM ;  wire \c3<0>/GROM ;  wire \c1<0>/FROM ;  wire \c1<0>/GROM ;  wire \l_carry<1>/FROM ;  wire \l_carry<1>/GROM ;  wire \p0__n0007/FROM ;  wire \p0__n0007/GROM ;  wire \c2<1>/FROM ;  wire \c2<1>/GROM ;  wire \row1<1>/FROM ;  wire \row1<1>/GROM ;  wire VCC;  wire [2 : 0] c2;  wire [2 : 1] row2;  wire [2 : 0] c3;  wire [1 : 0] c1;  wire [2 : 1] row1;  wire [2 : 2] row3;  wire [1 : 0] l_carry;  initial $sdf_annotate("array_mult_map.sdf");  X_IPAD \x<0>/PAD  (    .PAD(x[0])  );  X_BUF \x<0>/IMUX  (    .I(\x<0>/IBUF ),    .O(x_0_IBUF)  );  X_BUF x_0_IBUF_0 (    .I(x[0]),    .O(\x<0>/IBUF )  );  X_IPAD \x<1>/PAD  (    .PAD(x[1])  );  X_BUF \x<1>/IMUX  (    .I(\x<1>/IBUF ),    .O(x_1_IBUF)  );  X_BUF x_1_IBUF_1 (    .I(x[1]),    .O(\x<1>/IBUF )  );  X_IPAD \x<2>/PAD  (    .PAD(x[2])  );  X_BUF \x<2>/IMUX  (    .I(\x<2>/IBUF ),    .O(x_2_IBUF)  );  X_BUF x_2_IBUF_2 (    .I(x[2]),    .O(\x<2>/IBUF )  );  X_IPAD \x<3>/PAD  (    .PAD(x[3])  );  X_BUF \x<3>/IMUX  (    .I(\x<3>/IBUF ),    .O(x_3_IBUF)  );  X_BUF x_3_IBUF_3 (    .I(x[3]),    .O(\x<3>/IBUF )  );  X_IPAD \y<0>/PAD  (    .PAD(y[0])  );  X_BUF \y<0>/IMUX  (    .I(\y<0>/IBUF ),    .O(y_0_IBUF)  );  X_BUF y_0_IBUF_4 (    .I(y[0]),    .O(\y<0>/IBUF )  );  X_IPAD \y<1>/PAD  (    .PAD(y[1])  );  X_BUF \y<1>/IMUX  (    .I(\y<1>/IBUF ),    .O(y_1_IBUF)  );  X_BUF y_1_IBUF_5 (    .I(y[1]),    .O(\y<1>/IBUF )  );  X_IPAD \y<2>/PAD  (    .PAD(y[2])  );  X_BUF \y<2>/IMUX  (    .I(\y<2>/IBUF ),    .O(y_2_IBUF)  );  X_BUF y_2_IBUF_6 (    .I(y[2]),    .O(\y<2>/IBUF )  );  X_IPAD \y<3>/PAD  (    .PAD(y[3])  );  X_BUF \y<3>/IMUX  (    .I(\y<3>/IBUF ),    .O(y_3_IBUF)  );  X_BUF y_3_IBUF_7 (    .I(y[3]),    .O(\y<3>/IBUF )  );  X_OPAD \p<0>/PAD  (    .PAD(p[0])  );  X_TRI p_0_OBUF_8 (    .I(\p<0>/OUTMUX ),    .CTL(\p<0>/ENABLE ),    .O(p[0])  );  X_INV \p<0>/ENABLEINV  (    .I(\p<0>/TORGTS ),    .O(\p<0>/ENABLE )  );  X_BUF \p<0>/GTS_OR  (    .I(GTS),    .O(\p<0>/TORGTS )  );  X_BUF \p<0>/OUTMUX_9  (    .I(p_0_OBUF),    .O(\p<0>/OUTMUX )  );  X_OPAD \p<1>/PAD  (    .PAD(p[1])  );  X_TRI p_1_OBUF_10 (    .I(\p<1>/OUTMUX ),    .CTL(\p<1>/ENABLE ),    .O(p[1])  );  X_INV \p<1>/ENABLEINV  (    .I(\p<1>/TORGTS ),    .O(\p<1>/ENABLE )  );  X_BUF \p<1>/GTS_OR  (    .I(GTS),    .O(\p<1>/TORGTS )  );  X_BUF \p<1>/OUTMUX_11  (    .I(p_1_OBUF),    .O(\p<1>/OUTMUX )  );  X_OPAD \p<2>/PAD  (    .PAD(p[2])  );  X_TRI p_2_OBUF_12 (    .I(\p<2>/OUTMUX ),    .CTL(\p<2>/ENABLE ),    .O(p[2])  );  X_INV \p<2>/ENABLEINV  (    .I(\p<2>/TORGTS ),    .O(\p<2>/ENABLE )  );  X_BUF \p<2>/GTS_OR  (    .I(GTS),    .O(\p<2>/TORGTS )  );  X_BUF \p<2>/OUTMUX_13  (    .I(p_2_OBUF),    .O(\p<2>/OUTMUX )  );  X_OPAD \p<3>/PAD  (    .PAD(p[3])  );  X_TRI p_3_OBUF_14 (    .I(\p<3>/OUTMUX ),    .CTL(\p<3>/ENABLE ),    .O(p[3])  );  X_INV \p<3>/ENABLEINV  (    .I(\p<3>/TORGTS ),    .O(\p<3>/ENABLE )  );  X_BUF \p<3>/GTS_OR  (    .I(GTS),    .O(\p<3>/TORGTS )  );  X_BUF \p<3>/OUTMUX_15  (    .I(p_3_OBUF),    .O(\p<3>/OUTMUX )  );  X_OPAD \p<4>/PAD  (    .PAD(p[4])  );  X_TRI p_4_OBUF_16 (    .I(\p<4>/OUTMUX ),    .CTL(\p<4>/ENABLE ),    .O(p[4])  );  X_INV \p<4>/ENABLEINV  (    .I(\p<4>/TORGTS ),    .O(\p<4>/ENABLE )  );  X_BUF \p<4>/GTS_OR  (    .I(GTS),    .O(\p<4>/TORGTS )  );  X_BUF \p<4>/OUTMUX_17  (    .I(p_4_OBUF),    .O(\p<4>/OUTMUX )  );  X_OPAD \p<5>/PAD  (    .PAD(p[5])  );  X_TRI p_5_OBUF_18 (    .I(\p<5>/OUTMUX ),    .CTL(\p<5>/ENABLE ),    .O(p[5])  );  X_INV \p<5>/ENABLEINV  (    .I(\p<5>/TORGTS ),    .O(\p<5>/ENABLE )  );  X_BUF \p<5>/GTS_OR  (    .I(GTS),    .O(\p<5>/TORGTS )  );  X_BUF \p<5>/OUTMUX_19  (    .I(p_5_OBUF),    .O(\p<5>/OUTMUX )  );  X_OPAD \p<6>/PAD  (    .PAD(p[6])  );  X_TRI p_6_OBUF_20 (    .I(\p<6>/OUTMUX ),    .CTL(\p<6>/ENABLE ),    .O(p[6])  );  X_INV \p<6>/ENABLEINV  (    .I(\p<6>/TORGTS ),    .O(\p<6>/ENABLE )  );  X_BUF \p<6>/GTS_OR  (    .I(GTS),    .O(\p<6>/TORGTS )  );  X_BUF \p<6>/OUTMUX_21  (    .I(p_6_OBUF),    .O(\p<6>/OUTMUX )  );  X_OPAD \p<7>/PAD  (    .PAD(p[7])  );  X_TRI p_7_OBUF_22 (    .I(\p<7>/OUTMUX ),    .CTL(\p<7>/ENABLE ),    .O(p[7])  );  X_INV \p<7>/ENABLEINV  (    .I(\p<7>/TORGTS ),    .O(\p<7>/ENABLE )  );  X_BUF \p<7>/GTS_OR  (    .I(GTS),    .O(\p<7>/TORGTS )  );  X_BUF \p<7>/OUTMUX_23  (    .I(p_7_OBUF),    .O(\p<7>/OUTMUX )  );  defparam \p2_Madd__AUX_2_Mxor_Result<1>_Result1 .INIT = 16'hE8C0;  X_LUT4 \p2_Madd__AUX_2_Mxor_Result<1>_Result1  (    .ADR0(x_1_IBUF),    .ADR1(c2[1]),    .ADR2(row2[2]),    .ADR3(y_3_IBUF),    .O(\c3<1>/FROM )  );  defparam l_Madd__n0002_Mxor_Result_Result1.INIT = 16'h6996;  X_LUT4 l_Madd__n0002_Mxor_Result_Result1 (    .ADR0(c3[0]),    .ADR1(p2__n0004),    .ADR2(row2[2]),    .ADR3(c2[1]),    .O(\c3<1>/GROM )  );  X_BUF \c3<1>/XUSED  (    .I(\c3<1>/FROM ),    .O(c3[1])  );  X_BUF \c3<1>/YUSED  (    .I(\c3<1>/GROM ),    .O(p_4_OBUF)  );  defparam p0__n00031.INIT = 16'h8888;  X_LUT4 p0__n00031 (    .ADR0(x_2_IBUF),    .ADR1(y_1_IBUF),    .ADR2(VCC),    .ADR3(VCC),    .O(\p0__n0003/FROM )  );  defparam p1__n00031.INIT = 16'h8888;  X_LUT4 p1__n00031 (    .ADR0(x_2_IBUF),    .ADR1(y_2_IBUF),    .ADR2(VCC),    .ADR3(VCC),    .O(\p0__n0003/GROM )  );  X_BUF \p0__n0003/XUSED  (    .I(\p0__n0003/FROM ),    .O(p0__n0003)  );  X_BUF \p0__n0003/YUSED  (    .I(\p0__n0003/GROM ),    .O(p1__n0003)  );  defparam \p0_Madd__AUX_3_Mxor_Result<0>_Result1 .INIT = 16'h6AC0;  X_LUT4 \p0_Madd__AUX_3_Mxor_Result<0>_Result1  (    .ADR0(y_0_IBUF),    .ADR1(x_0_IBUF),    .ADR2(y_1_IBUF),    .ADR3(x_1_IBUF),    .O(\p_1_OBUF/FROM )  );  defparam p1__n00071.INIT = 16'h8888;  X_LUT4 p1__n00071 (    .ADR0(x_3_IBUF),    .ADR1(y_1_IBUF),    .ADR2(VCC),    .ADR3(VCC),    .O(\p_1_OBUF/GROM )  );  X_BUF \p_1_OBUF/XUSED  (    .I(\p_1_OBUF/FROM ),    .O(p_1_OBUF)  );  X_BUF \p_1_OBUF/YUSED  (    .I(\p_1_OBUF/GROM ),    .O(p1__n0007)  );  defparam \p0_Madd__AUX_1_Mxor_Result<0>_Result1 .INIT = 16'h6AC0;  X_LUT4 \p0_Madd__AUX_1_Mxor_Result<0>_Result1  (    .ADR0(y_0_IBUF),    .ADR1(y_1_IBUF),    .ADR2(x_2_IBUF),    .ADR3(x_3_IBUF),    .O(\row1<2>/FROM )  );  defparam \p1_Madd__AUX_2_Mxor_Result<0>_Result1 .INIT = 16'h9666;  X_LUT4 \p1_Madd__AUX_2_Mxor_Result<0>_Result1  (    .ADR0(c1[1]),    .ADR1(row1[2]),    .ADR2(y_2_IBUF),    .ADR3(x_1_IBUF),    .O(\row1<2>/GROM )  );  X_BUF \row1<2>/XUSED  (    .I(\row1<2>/FROM ),    .O(row1[2])  );  X_BUF \row1<2>/YUSED  (    .I(\row1<2>/GROM ),    .O(row2[1])  );  defparam _n00101.INIT = 16'h8888;  X_LUT4 _n00101 (    .ADR0(x_0_IBUF),    .ADR1(y_0_IBUF),    .ADR2(VCC),    .ADR3(VCC),    .O(\p_0_OBUF/FROM )  );  defparam \p1_Madd__AUX_3_Mxor_Result<0>_Result1 .INIT = 16'h9666;  X_LUT4 \p1_Madd__AUX_3_Mxor_Result<0>_Result1  (    .ADR0(c1[0]),    .ADR1(row1[1]),    .ADR2(y_2_IBUF),    .ADR3(x_0_IBUF),    .O(\p_0_OBUF/GROM )  );  X_BUF \p_0_OBUF/XUSED  (    .I(\p_0_OBUF/FROM ),    .O(p_0_OBUF)  );  X_BUF \p_0_OBUF/YUSED  (    .I(\p_0_OBUF/GROM ),    .O(p_2_OBUF)  );  defparam p2__n00031.INIT = 16'h8888;  X_LUT4 p2__n00031 (    .ADR0(x_2_IBUF),    .ADR1(y_3_IBUF),    .ADR2(VCC),    .ADR3(VCC),    .O(\p2__n0003/FROM )  );  defparam \p2_Madd__AUX_3_Mxor_Result<0>_Result1 .INIT = 16'h9666;  X_LUT4 \p2_Madd__AUX_3_Mxor_Result<0>_Result1  (    .ADR0(c2[0]),    .ADR1(row2[1]),    .ADR2(y_3_IBUF),    .ADR3(x_0_IBUF),    .O(\p2__n0003/GROM )  );  X_BUF \p2__n0003/XUSED  (    .I(\p2__n0003/FROM ),    .O(p2__n0003)  );  X_BUF \p2__n0003/YUSED  (    .I(\p2__n0003/GROM ),    .O(p_3_OBUF)  );  defparam \p1_Madd__AUX_1_Mxor_Result<1>_Result1 .INIT = 16'hE8C0;  X_LUT4 \p1_Madd__AUX_1_Mxor_Result<1>_Result1  (    .ADR0(p0__n0003),    .ADR1(p1__n0003),    .ADR2(p1__n0007),    .ADR3(p0__n0007),    .O(\c2<2>/FROM )  );  defparam \p2_Madd__AUX_1_Mxor_Result<0>_Result1 .INIT = 16'h9666;  X_LUT4 \p2_Madd__AUX_1_Mxor_Result<0>_Result1  (    .ADR0(p2__n0003),    .ADR1(c2[2]),    .ADR2(x_3_IBUF),    .ADR3(y_2_IBUF),    .O(\c2<2>/GROM )  );  X_BUF \c2<2>/XUSED  (    .I(\c2<2>/FROM ),    .O(c2[2])  );  X_BUF \c2<2>/YUSED  (    .I(\c2<2>/GROM ),    .O(row3[2])  );  defparam \p2_Madd__AUX_1_Mxor_Result<1>_Result1 .INIT = 16'hE8C0;  X_LUT4 \p2_Madd__AUX_1_Mxor_Result<1>_Result1  (    .ADR0(y_2_IBUF),    .ADR1(p2__n0003),    .ADR2(c2[2]),    .ADR3(x_3_IBUF),    .O(\c3<2>/FROM )  );  defparam \l_Madd__AUX_4_Mxor_Result<1>_Result1 .INIT = 16'hE8C0;  X_LUT4 \l_Madd__AUX_4_Mxor_Result<1>_Result1  (    .ADR0(y_3_IBUF),    .ADR1(c3[2]),    .ADR2(l_carry[1]),    .ADR3(x_3_IBUF),    .O(\c3<2>/GROM )  );  X_BUF \c3<2>/XUSED  (    .I(\c3<2>/FROM ),    .O(c3[2])  );  X_BUF \c3<2>/YUSED  (    .I(\c3<2>/GROM ),    .O(p_7_OBUF)  );  defparam \l_Madd__AUX_5_Mxor_Result<0>_Result1 .INIT = 16'h9696;  X_LUT4 \l_Madd__AUX_5_Mxor_Result<0>_Result1  (    .ADR0(c3[1]),    .ADR1(row3[2]),    .ADR2(l_carry[0]),    .ADR3(VCC),    .O(\p_5_OBUF/GROM )  );  X_BUF \p_5_OBUF/YUSED  (    .I(\p_5_OBUF/GROM ),    .O(p_5_OBUF)  );  defparam \p2_Madd__AUX_3_Mxor_Result<1>_Result1 .INIT = 16'hE8C0;  X_LUT4 \p2_Madd__AUX_3_Mxor_Result<1>_Result1  (    .ADR0(y_3_IBUF),    .ADR1(c2[0]),    .ADR2(row2[1]),    .ADR3(x_0_IBUF),    .O(\c3<0>/FROM )  );  defparam l_Madd__n0002_Cout1.INIT = 16'h8228;  X_LUT4 l_Madd__n0002_Cout1 (    .ADR0(c3[0]),    .ADR1(p2__n0004),    .ADR2(row2[2]),    .ADR3(c2[1]),    .O(\c3<0>/GROM )  );  X_BUF \c3<0>/XUSED  (    .I(\c3<0>/FROM ),    .O(c3[0])  );  X_BUF \c3<0>/YUSED  (    .I(\c3<0>/GROM ),    .O(l_carry[0])  );  defparam p0_Madd__AUX_3__n00001.INIT = 16'h8000;  X_LUT4 p0_Madd__AUX_3__n00001 (    .ADR0(x_1_IBUF),    .ADR1(y_0_IBUF),    .ADR2(x_0_IBUF),    .ADR3(y_1_IBUF),    .O(\c1<0>/FROM )  );  defparam p0_Madd__AUX_2__n00001.INIT = 16'h8000;  X_LUT4 p0_Madd__AUX_2__n00001 (    .ADR0(x_2_IBUF),    .ADR1(y_0_IBUF),    .ADR2(x_1_IBUF),    .ADR3(y_1_IBUF),    .O(\c1<0>/GROM )  );  X_BUF \c1<0>/XUSED  (    .I(\c1<0>/FROM ),    .O(c1[0])  );  X_BUF \c1<0>/YUSED  (    .I(\c1<0>/GROM ),    .O(c1[1])  );  defparam \l_Madd__AUX_5_Mxor_Result<1>_Result1 .INIT = 16'hE8E8;  X_LUT4 \l_Madd__AUX_5_Mxor_Result<1>_Result1  (    .ADR0(l_carry[0]),    .ADR1(row3[2]),    .ADR2(c3[1]),    .ADR3(VCC),    .O(\l_carry<1>/FROM )  );  defparam \l_Madd__AUX_4_Mxor_Result<0>_Result1 .INIT = 16'h9666;  X_LUT4 \l_Madd__AUX_4_Mxor_Result<0>_Result1  (    .ADR0(c3[2]),    .ADR1(l_carry[1]),    .ADR2(x_3_IBUF),    .ADR3(y_3_IBUF),    .O(\l_carry<1>/GROM )  );  X_BUF \l_carry<1>/XUSED  (    .I(\l_carry<1>/FROM ),    .O(l_carry[1])  );  X_BUF \l_carry<1>/YUSED  (    .I(\l_carry<1>/GROM ),    .O(p_6_OBUF)  );  defparam p0__n00071.INIT = 16'h8888;  X_LUT4 p0__n00071 (    .ADR0(x_3_IBUF),    .ADR1(y_0_IBUF),    .ADR2(VCC),    .ADR3(VCC),    .O(\p0__n0007/FROM )  );  defparam \p1_Madd__AUX_1_Mxor_Result<0>_Result1 .INIT = 16'h9666;  X_LUT4 \p1_Madd__AUX_1_Mxor_Result<0>_Result1  (    .ADR0(p1__n0003),    .ADR1(p1__n0007),    .ADR2(p0__n0003),    .ADR3(p0__n0007),    .O(\p0__n0007/GROM )  );  X_BUF \p0__n0007/XUSED  (    .I(\p0__n0007/FROM ),    .O(p0__n0007)  );  X_BUF \p0__n0007/YUSED  (    .I(\p0__n0007/GROM ),    .O(row2[2])  );  defparam \p1_Madd__AUX_2_Mxor_Result<1>_Result1 .INIT = 16'hE8C0;  X_LUT4 \p1_Madd__AUX_2_Mxor_Result<1>_Result1  (    .ADR0(y_2_IBUF),    .ADR1(c1[1]),    .ADR2(row1[2]),    .ADR3(x_1_IBUF),    .O(\c2<1>/FROM )  );  defparam p2__n00041.INIT = 16'h8888;  X_LUT4 p2__n00041 (    .ADR0(x_1_IBUF),    .ADR1(y_3_IBUF),    .ADR2(VCC),    .ADR3(VCC),    .O(\c2<1>/GROM )  );  X_BUF \c2<1>/XUSED  (    .I(\c2<1>/FROM ),    .O(c2[1])  );  X_BUF \c2<1>/YUSED  (    .I(\c2<1>/GROM ),    .O(p2__n0004)  );  defparam \p0_Madd__AUX_2_Mxor_Result<0>_Result1 .INIT = 16'h6AC0;  X_LUT4 \p0_Madd__AUX_2_Mxor_Result<0>_Result1  (    .ADR0(y_0_IBUF),    .ADR1(x_1_IBUF),    .ADR2(y_1_IBUF),    .ADR3(x_2_IBUF),    .O(\row1<1>/FROM )  );  defparam \p1_Madd__AUX_3_Mxor_Result<1>_Result1 .INIT = 16'hE8C0;  X_LUT4 \p1_Madd__AUX_3_Mxor_Result<1>_Result1  (    .ADR0(y_2_IBUF),    .ADR1(c1[0]),    .ADR2(row1[1]),    .ADR3(x_0_IBUF),    .O(\row1<1>/GROM )  );  X_BUF \row1<1>/XUSED  (    .I(\row1<1>/FROM ),    .O(row1[1])  );  X_BUF \row1<1>/YUSED  (    .I(\row1<1>/GROM ),    .O(c2[0])  );  X_ONE NlwBlock_array_mult_VCC (    .O(VCC)  );endmodule

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