prev_cmp_dds.fit.qmsg

实现任意小数分频的VHDL源代码

{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "3.087 ns register register " "Info: Estimated most critical path is register to register delay of 3.087 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[0\] 1 REG LAB_X15_Y7 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X15_Y7; Fanout = 2; REG Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[0\]'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[0] } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.648 ns) + CELL(0.621 ns) 1.269 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[0\]~81 2 COMB LAB_X15_Y7 2 " "Info: 2: + IC(0.648 ns) + CELL(0.621 ns) = 1.269 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[0\]~81'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.269 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[0] lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[0]~81 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.355 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[1\]~82 3 COMB LAB_X15_Y7 2 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 1.355 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[1\]~82'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[0]~81 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[1]~82 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.441 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[2\]~83 4 COMB LAB_X15_Y7 2 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 1.441 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[2\]~83'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[1]~82 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[2]~83 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.527 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[3\]~84 5 COMB LAB_X15_Y7 2 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 1.527 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[3\]~84'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[2]~83 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[3]~84 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.613 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[4\]~85 6 COMB LAB_X15_Y7 2 " "Info: 6: + IC(0.000 ns) + CELL(0.086 ns) = 1.613 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[4\]~85'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[3]~84 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[4]~85 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.699 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[5\]~86 7 COMB LAB_X15_Y7 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 1.699 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[5\]~86'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[4]~85 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[5]~86 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.785 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[6\]~87 8 COMB LAB_X15_Y7 2 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 1.785 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[6\]~87'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[5]~86 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[6]~87 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.871 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[7\]~88 9 COMB LAB_X15_Y7 2 " "Info: 9: + IC(0.000 ns) + CELL(0.086 ns) = 1.871 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[7\]~88'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[6]~87 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[7]~88 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.957 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[8\]~89 10 COMB LAB_X15_Y7 2 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 1.957 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[8\]~89'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[7]~88 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[8]~89 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.043 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[9\]~90 11 COMB LAB_X15_Y7 2 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 2.043 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[9\]~90'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[8]~89 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[9]~90 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.129 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[10\]~91 12 COMB LAB_X15_Y7 2 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 2.129 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[10\]~91'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[9]~90 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[10]~91 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.215 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[11\]~92 13 COMB LAB_X15_Y7 2 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 2.215 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[11\]~92'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[10]~91 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[11]~92 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.301 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[12\]~93 14 COMB LAB_X15_Y7 2 " "Info: 14: + IC(0.000 ns) + CELL(0.086 ns) = 2.301 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[12\]~93'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[11]~92 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[12]~93 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.387 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[13\]~94 15 COMB LAB_X15_Y7 2 " "Info: 15: + IC(0.000 ns) + CELL(0.086 ns) = 2.387 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[13\]~94'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[12]~93 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[13]~94 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.473 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[14\]~95 16 COMB LAB_X15_Y7 1 " "Info: 16: + IC(0.000 ns) + CELL(0.086 ns) = 2.473 ns; Loc. = LAB_X15_Y7; Fanout = 1; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[14\]~95'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[13]~94 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[14]~95 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 2.979 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[15\]~65 17 COMB LAB_X15_Y7 1 " "Info: 17: + IC(0.000 ns) + CELL(0.506 ns) = 2.979 ns; Loc. = LAB_X15_Y7; Fanout = 1; COMB Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[15\]~65'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[14]~95 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[15]~65 } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 3.087 ns lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[15\] 18 REG LAB_X15_Y7 2 " "Info: 18: + IC(0.000 ns) + CELL(0.108 ns) = 3.087 ns; Loc. = LAB_X15_Y7; Fanout = 2; REG Node = 'lpm_add_sub2:inst\|lpm_add_sub:lpm_add_sub_component\|add_sub_9mh:auto_generated\|pipeline_dffe\[15\]'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[15]~65 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[15] } "NODE_NAME" } } { "db/add_sub_9mh.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/DDS小数分频/db/add_sub_9mh.tdf" 32 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.439 ns ( 79.01 % ) " "Info: Total cell delay = 2.439 ns ( 79.01 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.648 ns ( 20.99 % ) " "Info: Total interconnect delay = 0.648 ns ( 20.99 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "3.087 ns" { lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[0] lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[0]~81 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[1]~82 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[2]~83 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[3]~84 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[4]~85 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[5]~86 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[6]~87 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[7]~88 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[8]~89 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[9]~90 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[10]~91 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[11]~92 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[12]~93 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[13]~94 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[14]~95 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[15]~65 lpm_add_sub2:inst|lpm_add_sub:lpm_add_sub_component|add_sub_9mh:auto_generated|pipeline_dffe[15] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 0 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "X12_Y0 X24_Y13 " "Info: The peak interconnect region extends from location X12_Y0 to location X24_Y13" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0 "" 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "" 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0}
{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "1 " "Warning: Found 1 output pins without output pin load capacitance assignment" { { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "outclk 0 " "Info: Pin \"outclk\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0}  } {  } 0 0 "Found %1!d! output pins without output pin load capacitance assignment" 0 0 "" 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 0 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "" 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Documents and Settings/Administrator/桌面/DDS小数分频/DDS.fit.smsg " "Info: Generated suppressed messages file C:/Documents and Settings/Administrator/桌面/DDS小数分频/DDS.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 19 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 19 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "206 " "Info: Allocated 206 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jan 16 16:48:14 2008 " "Info: Processing ended: Wed Jan 16 16:48:14 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}