an_dcfifo_top.vo

alteral FPGA VERILOG 利用 ROM DCFIFO 和RAM 实现高速到低速时钟域的数据传输

assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [22] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [22];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [23] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [23];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [24] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [24];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [25] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [25];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [26] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [26];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [27] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [27];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [28] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [28];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [29] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [29];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [30] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [30];
assign \mydcfifo|dcfifo_component|auto_generated|fifo_ram|q_b [31] = \mydcfifo|dcfifo_component|auto_generated|fifo_ram|ram_block9a0_PORTBDATAOUT_bus [31];

assign \myrom|altsyncram_component|auto_generated|q_a [0] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [0];
assign \myrom|altsyncram_component|auto_generated|q_a [1] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [1];
assign \myrom|altsyncram_component|auto_generated|q_a [2] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [2];
assign \myrom|altsyncram_component|auto_generated|q_a [3] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [3];
assign \myrom|altsyncram_component|auto_generated|q_a [4] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [4];
assign \myrom|altsyncram_component|auto_generated|q_a [5] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [5];
assign \myrom|altsyncram_component|auto_generated|q_a [6] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [6];
assign \myrom|altsyncram_component|auto_generated|q_a [7] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [7];
assign \myrom|altsyncram_component|auto_generated|q_a [8] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [8];
assign \myrom|altsyncram_component|auto_generated|q_a [9] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [9];
assign \myrom|altsyncram_component|auto_generated|q_a [10] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [10];
assign \myrom|altsyncram_component|auto_generated|q_a [11] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [11];
assign \myrom|altsyncram_component|auto_generated|q_a [12] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [12];
assign \myrom|altsyncram_component|auto_generated|q_a [13] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [13];
assign \myrom|altsyncram_component|auto_generated|q_a [14] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [14];
assign \myrom|altsyncram_component|auto_generated|q_a [15] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [15];
assign \myrom|altsyncram_component|auto_generated|q_a [16] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [16];
assign \myrom|altsyncram_component|auto_generated|q_a [17] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [17];
assign \myrom|altsyncram_component|auto_generated|q_a [18] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [18];
assign \myrom|altsyncram_component|auto_generated|q_a [19] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [19];
assign \myrom|altsyncram_component|auto_generated|q_a [20] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [20];
assign \myrom|altsyncram_component|auto_generated|q_a [21] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [21];
assign \myrom|altsyncram_component|auto_generated|q_a [22] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [22];
assign \myrom|altsyncram_component|auto_generated|q_a [23] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [23];
assign \myrom|altsyncram_component|auto_generated|q_a [24] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [24];
assign \myrom|altsyncram_component|auto_generated|q_a [25] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [25];
assign \myrom|altsyncram_component|auto_generated|q_a [26] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [26];
assign \myrom|altsyncram_component|auto_generated|q_a [27] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [27];
assign \myrom|altsyncram_component|auto_generated|q_a [28] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [28];
assign \myrom|altsyncram_component|auto_generated|q_a [29] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [29];
assign \myrom|altsyncram_component|auto_generated|q_a [30] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [30];
assign \myrom|altsyncram_component|auto_generated|q_a [31] = \myrom|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [31];

// atom is at FF_X24_Y22_N29
dffeas \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe15a[1] (
	.clk(\trclk~inputclkctrl_outclk ),
	.d(gnd),
	.asdata(\mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a [1]),
	.clrn(!\reset~inputclkctrl_outclk ),
	.aload(gnd),
	.sclr(gnd),
	.sload(vcc),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.q(\mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe15a [1]),
	.prn(vcc));
// synopsys translate_off
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe15a[1] .is_wysiwyg = "true";
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe15a[1] .power_up = "low";
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe15a[1] .x_on_violation = "off";
// synopsys translate_on

// atom is at FF_X25_Y22_N19
dffeas \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1] (
	.clk(\trclk~inputclkctrl_outclk ),
	.d(\mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1]~feeder_combout ),
	.asdata(vcc),
	.clrn(!\reset~inputclkctrl_outclk ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.q(\mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a [1]),
	.prn(vcc));
// synopsys translate_off
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1] .is_wysiwyg = "true";
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1] .power_up = "low";
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1] .x_on_violation = "off";
// synopsys translate_on

// atom is at IOIBUF_X0_Y28_N1
stratixiii_io_ibuf \rvclk~input (
	.i(rvclk),
	.ibar(gnd),
	.o(\rvclk~input_o ));
// synopsys translate_off
defparam \rvclk~input .bus_hold = "false";
defparam \rvclk~input .simulate_z_as = "z";
// synopsys translate_on

// atom is at IOIBUF_X0_Y23_N1
stratixiii_io_ibuf \reset~input (
	.i(reset),
	.ibar(gnd),
	.o(\reset~input_o ));
// synopsys translate_off
defparam \reset~input .bus_hold = "false";
defparam \reset~input .simulate_z_as = "z";
// synopsys translate_on

// atom is at IOIBUF_X0_Y28_N32
stratixiii_io_ibuf \trclk~input (
	.i(trclk),
	.ibar(gnd),
	.o(\trclk~input_o ));
// synopsys translate_off
defparam \trclk~input .bus_hold = "false";
defparam \trclk~input .simulate_z_as = "z";
// synopsys translate_on

// atom is at LABCELL_X25_Y22_N18
stratixiii_lcell_comb \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1]~feeder (
// Equation(s):
// \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1]~feeder_combout  = \mydcfifo|dcfifo_component|auto_generated|rdptr_g [1]

	.dataa(gnd),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(!\mydcfifo|dcfifo_component|auto_generated|rdptr_g [1]),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1]~feeder_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1]~feeder .extended_lut = "off";
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1]~feeder .lut_mask = 64'h00000000FFFFFFFF;
defparam \mydcfifo|dcfifo_component|auto_generated|ws_dgrp|dffpipe13|dffe14a[1]~feeder .shared_arith = "off";
// synopsys translate_on

// atom is at IOOBUF_X0_Y20_N113
stratixiii_io_obuf \word_count[0]~output (
	.i(\rdctrl_logic|word_count_o [0]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[0]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[0]~output .bus_hold = "false";
defparam \word_count[0]~output .open_drain_output = "false";
defparam \word_count[0]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y19_N20
stratixiii_io_obuf \word_count[1]~output (
	.i(\rdctrl_logic|word_count_o [1]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[1]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[1]~output .bus_hold = "false";
defparam \word_count[1]~output .open_drain_output = "false";
defparam \word_count[1]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y20_N82
stratixiii_io_obuf \word_count[2]~output (
	.i(\rdctrl_logic|word_count_o [2]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[2]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[2]~output .bus_hold = "false";
defparam \word_count[2]~output .open_drain_output = "false";
defparam \word_count[2]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y19_N82
stratixiii_io_obuf \word_count[3]~output (
	.i(\rdctrl_logic|word_count_o [3]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[3]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[3]~output .bus_hold = "false";
defparam \word_count[3]~output .open_drain_output = "false";
defparam \word_count[3]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y20_N20
stratixiii_io_obuf \word_count[4]~output (
	.i(\rdctrl_logic|word_count_o [4]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[4]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[4]~output .bus_hold = "false";
defparam \word_count[4]~output .open_drain_output = "false";
defparam \word_count[4]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y20_N51
stratixiii_io_obuf \word_count[5]~output (
	.i(\rdctrl_logic|word_count_o [5]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[5]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[5]~output .bus_hold = "false";
defparam \word_count[5]~output .open_drain_output = "false";
defparam \word_count[5]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y22_N2
stratixiii_io_obuf \word_count[6]~output (
	.i(\rdctrl_logic|word_count_o [6]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[6]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[6]~output .bus_hold = "false";
defparam \word_count[6]~output .open_drain_output = "false";
defparam \word_count[6]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y19_N51
stratixiii_io_obuf \word_count[7]~output (
	.i(\rdctrl_logic|word_count_o [7]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[7]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[7]~output .bus_hold = "false";
defparam \word_count[7]~output .open_drain_output = "false";
defparam \word_count[7]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X0_Y22_N95
stratixiii_io_obuf \word_count[8]~output (
	.i(\rdctrl_logic|word_count_o [8]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),
	.o(\word_count[8]~output_o ),
	.obar());
// synopsys translate_off
defparam \word_count[8]~output .bus_hold = "false";
defparam \word_count[8]~output .open_drain_output = "false";
defparam \word_count[8]~output .shift_series_termination_control = "false";
// synopsys translate_on

// atom is at IOOBUF_X53_Y20_N82
stratixiii_io_obuf \q[0]~output (
	.i(\myram|altsyncram_component|auto_generated|q_a [0]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(14'b00000000000000),
	.parallelterminationcontrol(14'b00000000000000),
	.devoe(devoe),