up3_clock.map.summary

用vhdl设计实现的多功能电子钟

Analysis & Synthesis Status : Successful - Tue Jun 19 10:47:06 2001
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : UP3_CLOCK
Top-level Entity Name : UP3_CLOCK
Family : Cyclone
Total logic elements : 937
Total pins : 24
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0