up3_clock.hif

用vhdl设计实现的多功能电子钟

Version 6.0 Build 178 04/27/2006 SJ Full Version
35
1750
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
ps2
# storage
db|UP3_CLOCK.(1).cnf
db|UP3_CLOCK.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
ps2.vhd
b554b4e4a1bdaf5ac8856fac65966
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
 constraint(ascii)
7 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
ps2:U1
}
# end
# entity
UP3_CLOCK
# storage
db|UP3_CLOCK.(0).cnf
db|UP3_CLOCK.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
UP3_CLOCK.vhd
7353423d7e98373728190739aeb6799
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# complete