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来自「FPGA的SRAM存储器的控制程序」· WSF 代码 · 共 2,743 行 · 第 1/3 页

WSF
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		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[9]";
		INDEX = 98;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[8]";
		INDEX = 99;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[7]";
		INDEX = 100;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[6]";
		INDEX = 101;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[5]";
		INDEX = 102;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[4]";
		INDEX = 103;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[3]";
		INDEX = 104;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[2]";
		INDEX = 105;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[1]";
		INDEX = 106;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[0]";
		INDEX = 107;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
}

VECTOR("G:/verilog/SRAMtest/Waveform1.vwf")
{
	ZOOM{
		ZBEGIN = 0;
		ZEND = 556894;
		NUMERATOR = 747;
		DENOMINATOR = 556894;
		TOP_INDEX = 83;
	}
	CLOCK{
		PERIOD = 10000;
		OFFSET = 0;
		DUTY_CYCLE = 50;
	}
	RANDOM_VALUE{
		INTERVAL_TYPE = RANDOM;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR";
		INDEX = 0;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[17]";
		INDEX = 1;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[16]";
		INDEX = 2;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[15]";
		INDEX = 3;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[14]";
		INDEX = 4;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[13]";
		INDEX = 5;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[12]";
		INDEX = 6;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[11]";
		INDEX = 7;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[10]";
		INDEX = 8;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[9]";
		INDEX = 9;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[8]";
		INDEX = 10;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[7]";
		INDEX = 11;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[6]";
		INDEX = 12;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[5]";
		INDEX = 13;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[4]";
		INDEX = 14;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[3]";
		INDEX = 15;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[2]";
		INDEX = 16;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[1]";
		INDEX = 17;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[0]";
		INDEX = 18;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_CE_N";
		INDEX = 19;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ";
		INDEX = 20;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[15]";
		INDEX = 21;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[14]";
		INDEX = 22;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[13]";
		INDEX = 23;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[12]";
		INDEX = 24;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[11]";
		INDEX = 25;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[10]";
		INDEX = 26;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[9]";
		INDEX = 27;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[8]";
		INDEX = 28;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[7]";
		INDEX = 29;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[6]";
		INDEX = 30;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[5]";
		INDEX = 31;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[4]";
		INDEX = 32;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[3]";
		INDEX = 33;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[2]";
		INDEX = 34;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[1]";
		INDEX = 35;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[0]";
		INDEX = 36;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_LB_N";
		INDEX = 37;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_OE_N";
		INDEX = 38;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_UB_N";
		INDEX = 39;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_WE_N";
		INDEX = 40;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR";
		INDEX = 41;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[17]";
		INDEX = 42;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[16]";
		INDEX = 43;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[15]";
		INDEX = 44;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[14]";
		INDEX = 45;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[13]";
		INDEX = 46;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[12]";
		INDEX = 47;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[11]";
		INDEX = 48;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[10]";
		INDEX = 49;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[9]";
		INDEX = 50;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[8]";
		INDEX = 51;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[7]";
		INDEX = 52;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[6]";
		INDEX = 53;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[5]";
		INDEX = 54;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[4]";
		INDEX = 55;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[3]";
		INDEX = 56;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[2]";
		INDEX = 57;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[1]";
		INDEX = 58;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[0]";
		INDEX = 59;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iBE_N";
		INDEX = 60;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iBE_N[1]";
		INDEX = 61;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iBE_N[0]";
		INDEX = 62;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iCE_N";
		INDEX = 63;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iCLK";
		INDEX = 64;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
		INDEX = 65;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[15]";
		INDEX = 66;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[14]";
		INDEX = 67;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[13]";
		INDEX = 68;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[12]";
		INDEX = 69;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[11]";
		INDEX = 70;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[10]";
		INDEX = 71;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[9]";
		INDEX = 72;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[8]";
		INDEX = 73;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[7]";
		INDEX = 74;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[6]";
		INDEX = 75;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[5]";
		INDEX = 76;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[4]";
		INDEX = 77;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[3]";
		INDEX = 78;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[2]";
		INDEX = 79;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[1]";
		INDEX = 80;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[0]";
		INDEX = 81;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iOE_N";
		INDEX = 82;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iWE_N";
		INDEX = 83;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
		INDEX = 84;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[15]";
		INDEX = 85;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[14]";
		INDEX = 86;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[13]";
		INDEX = 87;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[12]";
		INDEX = 88;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[11]";
		INDEX = 89;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[10]";
		INDEX = 90;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[9]";
		INDEX = 91;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[8]";
		INDEX = 92;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[7]";
		INDEX = 93;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[6]";
		INDEX = 94;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[5]";
		INDEX = 95;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[4]";
		INDEX = 96;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[3]";
		INDEX = 97;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[2]";
		INDEX = 98;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[1]";
		INDEX = 99;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[0]";
		INDEX = 100;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
}
123

wed.wsf - 源码说明

本页面展示了「FPGA的SRAM存储器的控制程序」中的 wed.wsf 源码文件，采用 WSF 编程语言编写，共 2,743 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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