wed.wsf

来自「FPGA的SRAM存储器的控制程序」· WSF 代码 · 共 2,743 行 · 第 1/3 页

WSF
2,743 行
字号
123
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[2]~result";
		INDEX = 110;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[3]~result";
		INDEX = 111;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[4]~result";
		INDEX = 112;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[5]~result";
		INDEX = 113;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[6]~result";
		INDEX = 114;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[7]~result";
		INDEX = 115;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[8]~result";
		INDEX = 116;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[9]~result";
		INDEX = 117;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[10]~result";
		INDEX = 118;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[11]~result";
		INDEX = 119;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[12]~result";
		INDEX = 120;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[13]~result";
		INDEX = 121;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[14]~result";
		INDEX = 122;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[15]~result";
		INDEX = 123;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
}

VECTOR("G:/verilog/SRAMtest/SRAMtest.vwf")
{
	ZOOM{
		ZBEGIN = 0;
		ZEND = 218000;
		NUMERATOR = 545;
		DENOMINATOR = 218000;
		TOP_INDEX = 40;
	}
	CLOCK{
		PERIOD = 20000;
		OFFSET = 0;
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		SIGNAL = "SW[5]";
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		SIGNAL = "SW[3]";
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		SCALE = 1;
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		SIGNAL = "SW[2]";
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		SIGNAL = "SW[1]";
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		SCALE = 1;
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		SIGNAL = "SW[0]";
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		VISIBLE = Y;
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		SIGNAL = "HEX0[3]";
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		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
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	LINE{
		SIGNAL = "HEX0[2]";
		INDEX = 21;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "HEX0[1]";
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		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "HEX0[0]";
		INDEX = 23;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
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		SIGNAL = "HEX1";
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		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "HEX1[6]";
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		SCALE = 1;
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		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "HEX1[4]";
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		SCALE = 1;
		VISIBLE = Y;
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		SCALE = 1;
		VISIBLE = Y;
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		SCALE = 1;
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		SIGNAL = "HEX1[1]";
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		SCALE = 1;
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		SCALE = 1;
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		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
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		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "HEX2[2]";
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		SCALE = 1;
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		SCALE = 1;
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		SCALE = 1;
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		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "HEX3[1]";
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		FORMAT = E;
		SCALE = 1;
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		SCALE = 1;
		VISIBLE = Y;
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		FORMAT = E;
		SCALE = 1;
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		SCALE = 1;
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		SCALE = 1;
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		FORMAT = E;
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		SIGNAL = "LEDR[7]";
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		SIGNAL = "LEDR[6]";
		INDEX = 60;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "LEDR[5]";
		INDEX = 61;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
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	}
	LINE{
		SIGNAL = "LEDR[4]";
		INDEX = 62;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
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		SIGNAL = "LEDR[3]";
		INDEX = 63;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
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		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
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		SIGNAL = "LEDR[1]";
		INDEX = 65;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "LEDR[0]";
		INDEX = 66;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR";
		INDEX = 67;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[17]";
		INDEX = 68;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[16]";
		INDEX = 69;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[15]";
		INDEX = 70;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[14]";
		INDEX = 71;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[13]";
		INDEX = 72;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[12]";
		INDEX = 73;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[11]";
		INDEX = 74;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[10]";
		INDEX = 75;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[9]";
		INDEX = 76;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[8]";
		INDEX = 77;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[7]";
		INDEX = 78;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[6]";
		INDEX = 79;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[5]";
		INDEX = 80;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[4]";
		INDEX = 81;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[3]";
		INDEX = 82;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[2]";
		INDEX = 83;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[1]";
		INDEX = 84;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_ADDR[0]";
		INDEX = 85;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_CE_N";
		INDEX = 86;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_LB_N";
		INDEX = 87;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_OE_N";
		INDEX = 88;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_UB_N";
		INDEX = 89;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_WE_N";
		INDEX = 90;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ";
		INDEX = 91;
		FORMAT = T;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[15]";
		INDEX = 92;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[14]";
		INDEX = 93;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[13]";
		INDEX = 94;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[12]";
		INDEX = 95;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[11]";
		INDEX = 96;
		FORMAT = E;
		SCALE = 1;
		VISIBLE = Y;
		FLAG = N;
	}
	LINE{
		SIGNAL = "SRAM_DQ[10]";
		INDEX = 97;
		FORMAT = E;
123

wed.wsf - 源码说明

本页面展示了「FPGA的SRAM存储器的控制程序」中的 wed.wsf 源码文件，采用 WSF 编程语言编写，共 2,743 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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