senduard.map.eqn

利用VHDL实现CPLD（EPM240T100C5）的串口发送程序

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-- without limitation, that your use is for the sole purpose of 
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-- applicable agreement for further details.
--A1L58Q is tbre~reg0
--operation mode is normal

A1L58Q_lut_out = A1L62 # A1L58Q & A1L48 # !A1L66;
A1L58Q = DFFEAS(A1L58Q_lut_out, clk16x, !rst, , , , , , );


--A1L89Q is tsre~reg0
--operation mode is normal

A1L89Q_lut_out = !A1L17 & (A1L89Q) # !A1L56;
A1L89Q = DFFEAS(A1L89Q_lut_out, !clkdiv[3], !rst, , , , , , );


--A1L37Q is sdo~reg0
--operation mode is normal

A1L37Q_lut_out = A1L72 & !A1L27 # !A1L72 & (!tsr[7]) # !A1L66;
A1L37Q = DFFEAS(A1L37Q_lut_out, !clkdiv[3], !rst, , A1L56, , , , );


--tbr[0] is tbr[0]
--operation mode is normal

tbr[0]_lut_out = din[0];
tbr[0] = DFFEAS(tbr[0]_lut_out, wrn, !rst, , , , , , );


--tbr[1] is tbr[1]
--operation mode is normal

tbr[1]_lut_out = din[1];
tbr[1] = DFFEAS(tbr[1]_lut_out, wrn, !rst, , , , , , );


--tbr[2] is tbr[2]
--operation mode is normal

tbr[2]_lut_out = din[2];
tbr[2] = DFFEAS(tbr[2]_lut_out, wrn, !rst, , , , , , );


--tbr[3] is tbr[3]
--operation mode is normal

tbr[3]_lut_out = din[3];
tbr[3] = DFFEAS(tbr[3]_lut_out, wrn, !rst, , , , , , );


--tbr[4] is tbr[4]
--operation mode is normal

tbr[4]_lut_out = din[4];
tbr[4] = DFFEAS(tbr[4]_lut_out, wrn, !rst, , , , , , );


--tbr[5] is tbr[5]
--operation mode is normal

tbr[5]_lut_out = din[5];
tbr[5] = DFFEAS(tbr[5]_lut_out, wrn, !rst, , , , , , );


--tbr[6] is tbr[6]
--operation mode is normal

tbr[6]_lut_out = din[6];
tbr[6] = DFFEAS(tbr[6]_lut_out, wrn, !rst, , , , , , );


--tbr[7] is tbr[7]
--operation mode is normal

tbr[7]_lut_out = din[7];
tbr[7] = DFFEAS(tbr[7]_lut_out, wrn, !rst, , , , , , );


--wrn1 is wrn1
--operation mode is normal

wrn1_lut_out = !wrn;
wrn1 = DFFEAS(wrn1_lut_out, clk16x, !rst, , , , , , );


--wrn2 is wrn2
--operation mode is normal

wrn2_lut_out = wrn1;
wrn2 = DFFEAS(wrn2_lut_out, clk16x, !rst, , , , , , );


--A1L62 is always3~13
--operation mode is normal

A1L62 = wrn1 & (!wrn2);


--no_bits_sent[1] is no_bits_sent[1]
--operation mode is normal

no_bits_sent[1]_lut_out = !no_bits_sent[1];
no_bits_sent[1] = DFFEAS(no_bits_sent[1]_lut_out, clkdiv[3], !A1L36, , no_bits_sent[0], , , , );


--no_bits_sent[0] is no_bits_sent[0]
--operation mode is normal

no_bits_sent[0]_lut_out = !no_bits_sent[0];
no_bits_sent[0] = DFFEAS(no_bits_sent[0]_lut_out, clkdiv[3], !A1L36, , , , , , );


--no_bits_sent[3] is no_bits_sent[3]
--operation mode is normal

no_bits_sent[3]_lut_out = !no_bits_sent[3];
no_bits_sent[3] = DFFEAS(no_bits_sent[3]_lut_out, clkdiv[3], !A1L36, , A1L01, , , , );


--no_bits_sent[2] is no_bits_sent[2]
--operation mode is normal

no_bits_sent[2]_lut_out = !no_bits_sent[2];
no_bits_sent[2] = DFFEAS(no_bits_sent[2]_lut_out, clkdiv[3], !A1L36, , A1L79, , , , );


--A1L48 is tbre~90
--operation mode is normal

A1L48 = no_bits_sent[1] # !no_bits_sent[2] # !no_bits_sent[3] # !no_bits_sent[0];


--A1L66 is reduce_nor~81
--operation mode is normal

A1L66 = no_bits_sent[0] # no_bits_sent[3] # no_bits_sent[2] # !no_bits_sent[1];


--clk16x is clk16x
--operation mode is normal

clk16x_lut_out = !clk16x;
clk16x = DFFEAS(clk16x_lut_out, clk, !rst, , A1L46, , , , );


--A1L56 is reduce_nor~3
--operation mode is normal

A1L56 = no_bits_sent[1] # no_bits_sent[3] # no_bits_sent[2] # !no_bits_sent[0];


--A1L17 is sdo~292
--operation mode is normal

A1L17 = no_bits_sent[1] & no_bits_sent[0] & no_bits_sent[3] & !no_bits_sent[2];


--clkdiv[3] is clkdiv[3]
--operation mode is normal

clkdiv[3]_lut_out = !clkdiv[3];
clkdiv[3] = DFFEAS(clkdiv[3]_lut_out, clk16x, !rst, , A1L84, , , , );


--A1L27 is sdo~293
--operation mode is normal

A1L27 = A1L17 # !A1L37Q;


--tsr[7] is tsr[7]
--operation mode is normal

tsr[7]_lut_out = A1L56 & tsr[6] # !A1L56 & (tbr[7]);
tsr[7] = DFFEAS(tsr[7]_lut_out, !clkdiv[3], !rst, , A1L59, , , , );


--A1L72 is always6~53
--operation mode is normal

A1L72 = no_bits_sent[3] $ (!no_bits_sent[2] & (!no_bits_sent[0] # !no_bits_sent[1]));


--clk1x_enable is clk1x_enable
--operation mode is normal

clk1x_enable_lut_out = wrn1 & (A1L48 & clk1x_enable # !wrn2) # !wrn1 & (A1L48 & clk1x_enable);
clk1x_enable = DFFEAS(clk1x_enable_lut_out, clk16x, !rst, , , , , , );


--A1L36 is no_bits_sent~0
--operation mode is normal

A1L36 = rst # !clk1x_enable;


--A1L01 is add~258
--operation mode is normal

A1L01 = no_bits_sent[1] & no_bits_sent[0] & no_bits_sent[2];


--A1L79 is tsre~97
--operation mode is normal

A1L79 = no_bits_sent[1] & no_bits_sent[0];


--clk is clk
--operation mode is normal

clk_lut_out = !clk;
clk = DFFEAS(clk_lut_out, clk50, VCC, , , , , , );


--clkdiv2[7] is clkdiv2[7]
--operation mode is normal

clkdiv2[7]_lut_out = A1L11;
clkdiv2[7] = DFFEAS(clkdiv2[7]_lut_out, clk, !rst, , , , , , );


--clkdiv2[6] is clkdiv2[6]
--operation mode is normal

clkdiv2[6]_lut_out = A1L21 & !A1L46;
clkdiv2[6] = DFFEAS(clkdiv2[6]_lut_out, clk, !rst, , , , , , );


--A1L76 is reduce_nor~82
--operation mode is normal

A1L76 = clkdiv2[7] # !clkdiv2[6];


--clkdiv2[5] is clkdiv2[5]
--operation mode is normal

clkdiv2[5]_lut_out = A1L41;
clkdiv2[5] = DFFEAS(clkdiv2[5]_lut_out, clk, !rst, , , , , , );


--clkdiv2[3] is clkdiv2[3]
--operation mode is normal

clkdiv2[3]_lut_out = A1L61;
clkdiv2[3] = DFFEAS(clkdiv2[3]_lut_out, clk, !rst, , , , , , );


--clkdiv2[2] is clkdiv2[2]
--operation mode is normal

clkdiv2[2]_lut_out = A1L81;
clkdiv2[2] = DFFEAS(clkdiv2[2]_lut_out, clk, !rst, , , , , , );


--clkdiv2[1] is clkdiv2[1]
--operation mode is normal

clkdiv2[1]_lut_out = A1L02 & !A1L46;
clkdiv2[1] = DFFEAS(clkdiv2[1]_lut_out, clk, !rst, , , , , , );


--clkdiv2[0] is clkdiv2[0]
--operation mode is normal

clkdiv2[0]_lut_out = A1L22;
clkdiv2[0] = DFFEAS(clkdiv2[0]_lut_out, clk, !rst, , , , , , );


--A1L86 is reduce_nor~83
--operation mode is normal

A1L86 = clkdiv2[3] # clkdiv2[2] # clkdiv2[1] # !clkdiv2[0];


--clkdiv2[4] is clkdiv2[4]
--operation mode is normal

clkdiv2[4]_lut_out = A1L42 & !A1L46;
clkdiv2[4] = DFFEAS(clkdiv2[4]_lut_out, clk, !rst, , , , , , );


--A1L46 is reduce_nor~0
--operation mode is normal

A1L46 = !A1L76 & !clkdiv2[5] & !A1L86 & clkdiv2[4];


--clkdiv[2] is clkdiv[2]
--operation mode is normal

clkdiv[2]_lut_out = !clkdiv[2];
clkdiv[2] = DFFEAS(clkdiv[2]_lut_out, clk16x, !rst, , A1L64, , , , );


--clkdiv[1] is clkdiv[1]
--operation mode is normal

clkdiv[1]_lut_out = !clkdiv[1];
clkdiv[1] = DFFEAS(clkdiv[1]_lut_out, clk16x, !rst, , A1L44, , , , );


--clkdiv[0] is clkdiv[0]
--operation mode is normal

clkdiv[0]_lut_out = !clkdiv[0];
clkdiv[0] = DFFEAS(clkdiv[0]_lut_out, clk16x, !rst, , clk1x_enable, , , , );


--A1L84 is clkdiv[3]~40
--operation mode is normal

A1L84 = clk1x_enable & clkdiv[2] & clkdiv[1] & clkdiv[0];


--tsr[6] is tsr[6]
--operation mode is normal

tsr[6]_lut_out = A1L56 & tsr[5] # !A1L56 & (tbr[6]);
tsr[6] = DFFEAS(tsr[6]_lut_out, !clkdiv[3], !rst, , A1L59, , , , );


--A1L59 is tsr[7]~582
--operation mode is normal

A1L59 = no_bits_sent[3] & !no_bits_sent[2] & (!no_bits_sent[0] # !no_bits_sent[1]) # !no_bits_sent[3] & (no_bits_sent[2] # no_bits_sent[0]);


--A1L11 is add~259
--operation mode is normal

A1L11_carry_eqn = A1L31;
A1L11 = clkdiv2[7] $ (A1L11_carry_eqn);


--A1L21 is add~264
--operation mode is arithmetic

A1L21_carry_eqn = A1L51;
A1L21 = clkdiv2[6] $ (!A1L21_carry_eqn);

--A1L31 is add~266
--operation mode is arithmetic

A1L31 = CARRY(clkdiv2[6] & (!A1L51));


--A1L41 is add~269
--operation mode is arithmetic

A1L41_carry_eqn = A1L52;
A1L41 = clkdiv2[5] $ (A1L41_carry_eqn);

--A1L51 is add~271
--operation mode is arithmetic

A1L51 = CARRY(!A1L52 # !clkdiv2[5]);


--A1L61 is add~274
--operation mode is arithmetic

A1L61_carry_eqn = A1L91;
A1L61 = clkdiv2[3] $ (A1L61_carry_eqn);

--A1L71 is add~276
--operation mode is arithmetic

A1L71 = CARRY(!A1L91 # !clkdiv2[3]);


--A1L81 is add~279
--operation mode is arithmetic

A1L81_carry_eqn = A1L12;
A1L81 = clkdiv2[2] $ (!A1L81_carry_eqn);

--A1L91 is add~281
--operation mode is arithmetic

A1L91 = CARRY(clkdiv2[2] & (!A1L12));


--A1L02 is add~284
--operation mode is arithmetic

A1L02_carry_eqn = A1L32;
A1L02 = clkdiv2[1] $ (A1L02_carry_eqn);

--A1L12 is add~286
--operation mode is arithmetic

A1L12 = CARRY(!A1L32 # !clkdiv2[1]);


--A1L22 is add~289
--operation mode is arithmetic

A1L22 = !clkdiv2[0];

--A1L32 is add~291
--operation mode is arithmetic

A1L32 = CARRY(clkdiv2[0]);


--A1L42 is add~294
--operation mode is arithmetic

A1L42_carry_eqn = A1L71;
A1L42 = clkdiv2[4] $ (!A1L42_carry_eqn);

--A1L52 is add~296
--operation mode is arithmetic

A1L52 = CARRY(clkdiv2[4] & (!A1L71));


--A1L64 is clkdiv[2]~41
--operation mode is normal

A1L64 = clk1x_enable & clkdiv[1] & clkdiv[0];


--A1L44 is clkdiv[1]~42
--operation mode is normal

A1L44 = clk1x_enable & clkdiv[0];


--tsr[5] is tsr[5]
--operation mode is normal

tsr[5]_lut_out = A1L56 & tsr[4] # !A1L56 & (tbr[5]);
tsr[5] = DFFEAS(tsr[5]_lut_out, !clkdiv[3], !rst, , A1L59, , , , );


--tsr[4] is tsr[4]
--operation mode is normal

tsr[4]_lut_out = A1L56 & tsr[3] # !A1L56 & (tbr[4]);
tsr[4] = DFFEAS(tsr[4]_lut_out, !clkdiv[3], !rst, , A1L59, , , , );


--tsr[3] is tsr[3]
--operation mode is normal

tsr[3]_lut_out = A1L56 & tsr[2] # !A1L56 & (tbr[3]);
tsr[3] = DFFEAS(tsr[3]_lut_out, !clkdiv[3], !rst, , A1L59, , , , );


--tsr[2] is tsr[2]
--operation mode is normal

tsr[2]_lut_out = A1L56 & tsr[1] # !A1L56 & (tbr[2]);
tsr[2] = DFFEAS(tsr[2]_lut_out, !clkdiv[3], !rst, , A1L59, , , , );


--tsr[1] is tsr[1]
--operation mode is normal

tsr[1]_lut_out = A1L56 & tsr[0] # !A1L56 & (tbr[1]);
tsr[1] = DFFEAS(tsr[1]_lut_out, !clkdiv[3], !rst, , A1L59, , , , );


--tsr[0] is tsr[0]
--operation mode is normal

tsr[0]_lut_out = A1L56 & tsr[0] & A1L72 # !A1L56 & (tbr[0]);
tsr[0] = DFFEAS(tsr[0]_lut_out, !clkdiv[3], !rst, , , , , , );


--rst is rst
--operation mode is input

rst = INPUT();


--din[0] is din[0]
--operation mode is input

din[0] = INPUT();


--wrn is wrn
--operation mode is input

wrn = INPUT();


--din[1] is din[1]
--operation mode is input

din[1] = INPUT();


--din[2] is din[2]
--operation mode is input

din[2] = INPUT();


--din[3] is din[3]
--operation mode is input

din[3] = INPUT();


--din[4] is din[4]
--operation mode is input

din[4] = INPUT();


--din[5] is din[5]
--operation mode is input

din[5] = INPUT();


--din[6] is din[6]
--operation mode is input

din[6] = INPUT();


--din[7] is din[7]
--operation mode is input

din[7] = INPUT();


--clk50 is clk50
--operation mode is input

clk50 = INPUT();


--tbre is tbre
--operation mode is output

tbre = OUTPUT(A1L58Q);


--tsre is tsre
--operation mode is output

tsre = OUTPUT(!A1L89Q);


--sdo is sdo
--operation mode is output

sdo = OUTPUT(!A1L37Q);


--LED[0] is LED[0]
--operation mode is output

LED[0] = OUTPUT(tbr[0]);


--LED[1] is LED[1]
--operation mode is output

LED[1] = OUTPUT(tbr[1]);


--LED[2] is LED[2]
--operation mode is output

LED[2] = OUTPUT(tbr[2]);


--LED[3] is LED[3]
--operation mode is output

LED[3] = OUTPUT(tbr[3]);


--LED[4] is LED[4]
--operation mode is output

LED[4] = OUTPUT(tbr[4]);


--LED[5] is LED[5]
--operation mode is output

LED[5] = OUTPUT(tbr[5]);


--LED[6] is LED[6]
--operation mode is output

LED[6] = OUTPUT(tbr[6]);


--LED[7] is LED[7]
--operation mode is output

LED[7] = OUTPUT(tbr[7]);