txxclock.tan.qmsg

VHDL编写的数字钟

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "modekey register hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] register hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 48.31 MHz 20.7 ns Internal " "Info: Clock \"modekey\" has Internal fmax of 48.31 MHz between source register \"hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]\" and destination register \"hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]\" (period= 20.7 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.300 ns + Longest register register " "Info: + Longest register to register delay is 8.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 1 REG LC8_F4 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC8_F4; Fanout = 6; REG Node = 'hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.700 ns) 2.700 ns hour:inst2\|h_overflow~47 2 COMB LC4_F3 1 " "Info: 2: + IC(1.000 ns) + CELL(1.700 ns) = 2.700 ns; Loc. = LC4_F3; Fanout = 1; COMB Node = 'hour:inst2\|h_overflow~47'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.700 ns" { hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] hour:inst2|h_overflow~47 } "NODE_NAME" } } { "hour.vhd" "" { Text "E:/study/EDA/myclock/txxclock/hour.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.600 ns) 5.300 ns hour:inst2\|h_overflow 3 COMB LC1_F4 2 " "Info: 3: + IC(1.000 ns) + CELL(1.600 ns) = 5.300 ns; Loc. = LC1_F4; Fanout = 2; COMB Node = 'hour:inst2\|h_overflow'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.600 ns" { hour:inst2|h_overflow~47 hour:inst2|h_overflow } "NODE_NAME" } } { "hour.vhd" "" { Text "E:/study/EDA/myclock/txxclock/hour.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 7.000 ns hour:inst2\|s2~0 4 COMB LC4_F4 5 " "Info: 4: + IC(0.300 ns) + CELL(1.400 ns) = 7.000 ns; Loc. = LC4_F4; Fanout = 5; COMB Node = 'hour:inst2\|s2~0'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { hour:inst2|h_overflow hour:inst2|s2~0 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.000 ns) 8.300 ns hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 5 REG LC8_F4 6 " "Info: 5: + IC(0.300 ns) + CELL(1.000 ns) = 8.300 ns; Loc. = LC8_F4; Fanout = 6; REG Node = 'hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.300 ns" { hour:inst2|s2~0 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.700 ns ( 68.67 % ) " "Info: Total cell delay = 5.700 ns ( 68.67 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.600 ns ( 31.33 % ) " "Info: Total interconnect delay = 2.600 ns ( 31.33 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.300 ns" { hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] hour:inst2|h_overflow~47 hour:inst2|h_overflow hour:inst2|s2~0 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "8.300 ns" { hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] hour:inst2|h_overflow~47 hour:inst2|h_overflow hour:inst2|s2~0 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 1.000ns 1.000ns 0.300ns 0.300ns } { 0.000ns 1.700ns 1.600ns 1.400ns 1.000ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-11.300 ns - Smallest " "Info: - Smallest clock skew is -11.300 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "modekey destination 9.800 ns + Shortest register " "Info: + Shortest clock path from clock \"modekey\" to destination register is 9.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns modekey 1 CLK PIN_125 2 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_125; Fanout = 2; CLK Node = 'modekey'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { modekey } "NODE_NAME" } } { "txxclock.bdf" "" { Schematic "E:/study/EDA/myclock/txxclock/txxclock.bdf" { { 416 -288 -120 432 "modekey" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns mode:inst9\|CQI\[0\] 2 REG LC2_F15 21 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC2_F15; Fanout = 21; REG Node = 'mode:inst9\|CQI\[0\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { modekey mode:inst9|CQI[0] } "NODE_NAME" } } { "mode.vhd" "" { Text "E:/study/EDA/myclock/txxclock/mode.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(1.600 ns) 6.100 ns selector:inst8\|y~37 3 COMB LC1_F8 9 " "Info: 3: + IC(1.600 ns) + CELL(1.600 ns) = 6.100 ns; Loc. = LC1_F8; Fanout = 9; COMB Node = 'selector:inst8\|y~37'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.200 ns" { mode:inst9|CQI[0] selector:inst8|y~37 } "NODE_NAME" } } { "selector.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector.vhd" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.700 ns) + CELL(0.000 ns) 9.800 ns hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 4 REG LC8_F4 6 " "Info: 4: + IC(3.700 ns) + CELL(0.000 ns) = 9.800 ns; Loc. = LC8_F4; Fanout = 6; REG Node = 'hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.700 ns" { selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.100 ns ( 41.84 % ) " "Info: Total cell delay = 4.100 ns ( 41.84 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.700 ns ( 58.16 % ) " "Info: Total interconnect delay = 5.700 ns ( 58.16 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.800 ns" { modekey mode:inst9|CQI[0] selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "9.800 ns" { modekey modekey~out mode:inst9|CQI[0] selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.600ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "modekey source 21.100 ns - Longest register " "Info: - Longest clock path from clock \"modekey\" to source register is 21.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns modekey 1 CLK PIN_125 2 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_125; Fanout = 2; CLK Node = 'modekey'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { modekey } "NODE_NAME" } } { "txxclock.bdf" "" { Schematic "E:/study/EDA/myclock/txxclock/txxclock.bdf" { { 416 -288 -120 432 "modekey" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns mode:inst9\|CQI\[0\] 2 REG LC2_F15 21 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC2_F15; Fanout = 21; REG Node = 'mode:inst9\|CQI\[0\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { modekey mode:inst9|CQI[0] } "NODE_NAME" } } { "mode.vhd" "" { Text "E:/study/EDA/myclock/txxclock/mode.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(1.600 ns) 6.100 ns mode:inst9\|Equal2~10 3 COMB LC3_F8 4 " "Info: 3: + IC(1.600 ns) + CELL(1.600 ns) = 6.100 ns; Loc. = LC3_F8; Fanout = 4; COMB Node = 'mode:inst9\|Equal2~10'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.200 ns" { mode:inst9|CQI[0] mode:inst9|Equal2~10 } "NODE_NAME" } } { "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.600 ns) 8.700 ns selector12:inst10\|y 4 REG LC8_F6 1 " "Info: 4: + IC(1.000 ns) + CELL(1.600 ns) = 8.700 ns; Loc. = LC8_F6; Fanout = 1; REG Node = 'selector12:inst10\|y'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.600 ns" { mode:inst9|Equal2~10 selector12:inst10|y } "NODE_NAME" } } { "selector12.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector12.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.600 ns) 10.600 ns selector:inst5\|y~37 5 COMB LC4_F6 8 " "Info: 5: + IC(0.300 ns) + CELL(1.600 ns) = 10.600 ns; Loc. = LC4_F6; Fanout = 8; COMB Node = 'selector:inst5\|y~37'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.900 ns" { selector12:inst10|y selector:inst5|y~37 } "NODE_NAME" } } { "selector.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector.vhd" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(0.500 ns) 12.700 ns minute:inst1\|sec1\[1\] 6 REG LC2_F11 5 " "Info: 6: + IC(1.600 ns) + CELL(0.500 ns) = 12.700 ns; Loc. = LC2_F11; Fanout = 5; REG Node = 'minute:inst1\|sec1\[1\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.100 ns" { selector:inst5|y~37 minute:inst1|sec1[1] } "NODE_NAME" } } { "minute.vhd" "" { Text "E:/study/EDA/myclock/txxclock/minute.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.700 ns) 14.700 ns minute:inst1\|s1~29 7 COMB LC4_F11 3 " "Info: 7: + IC(0.300 ns) + CELL(1.700 ns) = 14.700 ns; Loc. = LC4_F11; Fanout = 3; COMB Node = 'minute:inst1\|s1~29'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.000 ns" { minute:inst1|sec1[1] minute:inst1|s1~29 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(1.400 ns) 17.400 ns selector:inst8\|y~37 8 COMB LC1_F8 9 " "Info: 8: + IC(1.300 ns) + CELL(1.400 ns) = 17.400 ns; Loc. = LC1_F8; Fanout = 9; COMB Node = 'selector:inst8\|y~37'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.700 ns" { minute:inst1|s1~29 selector:inst8|y~37 } "NODE_NAME" } } { "selector.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector.vhd" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.700 ns) + CELL(0.000 ns) 21.100 ns hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 9 REG LC8_F4 6 " "Info: 9: + IC(3.700 ns) + CELL(0.000 ns) = 21.100 ns; Loc. = LC8_F4; Fanout = 6; REG Node = 'hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.700 ns" { selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "10.900 ns ( 51.66 % ) " "Info: Total cell delay = 10.900 ns ( 51.66 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.200 ns ( 48.34 % ) " "Info: Total interconnect delay = 10.200 ns ( 48.34 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "21.100 ns" { modekey mode:inst9|CQI[0] mode:inst9|Equal2~10 selector12:inst10|y selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "21.100 ns" { modekey modekey~out mode:inst9|CQI[0] mode:inst9|Equal2~10 selector12:inst10|y selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 1.000ns 0.300ns 1.600ns 0.300ns 1.300ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.600ns 1.600ns 1.600ns 0.500ns 1.700ns 1.400ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.800 ns" { modekey mode:inst9|CQI[0] selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "9.800 ns" { modekey modekey~out mode:inst9|CQI[0] selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.600ns 0.000ns } } } { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "21.100 ns" { modekey mode:inst9|CQI[0] mode:inst9|Equal2~10 selector12:inst10|y selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "21.100 ns" { modekey modekey~out mode:inst9|CQI[0] mode:inst9|Equal2~10 selector12:inst10|y selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 1.000ns 0.300ns 1.600ns 0.300ns 1.300ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.600ns 1.600ns 1.600ns 0.500ns 1.700ns 1.400ns 0.000ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.300 ns" { hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] hour:inst2|h_overflow~47 hour:inst2|h_overflow hour:inst2|s2~0 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "8.300 ns" { hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] hour:inst2|h_overflow~47 hour:inst2|h_overflow hour:inst2|s2~0 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 1.000ns 1.000ns 0.300ns 0.300ns } { 0.000ns 1.700ns 1.600ns 1.400ns 1.000ns } } } { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.800 ns" { modekey mode:inst9|CQI[0] selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "9.800 ns" { modekey modekey~out mode:inst9|CQI[0] selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.600ns 0.000ns } } } { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "21.100 ns" { modekey mode:inst9|CQI[0] mode:inst9|Equal2~10 selector12:inst10|y selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "21.100 ns" { modekey modekey~out mode:inst9|CQI[0] mode:inst9|Equal2~10 selector12:inst10|y selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 1.000ns 0.300ns 1.600ns 0.300ns 1.300ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.600ns 1.600ns 1.600ns 0.500ns 1.700ns 1.400ns 0.000ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Warning" "WTAN_CLOCK_WILL_NOT_OPERATE" "lHZCLK 21 " "Warning: Circuit may not operate. Detected 21 non-operational path(s) clocked by clock \"lHZCLK\" with clock skew larger than data delay. See Compilation Report for details." {  } {  } 0 0 "Circuit may not operate. Detected %2!d! non-operational path(s) clocked by clock \"%1!s!\" with clock skew larger than data delay. See Compilation Report for details." 0 0}
{ "Info" "ITDB_FULL_NEGATIVE_HOLD_RESULT" "hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] lHZCLK 1.2 ns " "Info: Found hold time violation between source  pin or register \"hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]\" and destination pin or register \"hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]\" for clock \"lHZCLK\" (Hold time is 1.2 ns)" { { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "1.400 ns + Largest " "Info: + Largest clock skew is 1.400 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "lHZCLK destination 19.700 ns + Longest register " "Info: + Longest clock path from clock \"lHZCLK\" to destination register is 19.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns lHZCLK 1 CLK PIN_55 9 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 9; CLK Node = 'lHZCLK'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { lHZCLK } "NODE_NAME" } } { "txxclock.bdf" "" { Schematic "E:/study/EDA/myclock/txxclock/txxclock.bdf" { { 256 -160 8 272 "lHZCLK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns second:inst\|sec1\[3\] 2 REG LC1_B6 3 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC1_B6; Fanout = 3; REG Node = 'second:inst\|sec1\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { lHZCLK second:inst|sec1[3] } "NODE_NAME" } } { "second.vhd" "" { Text "E:/study/EDA/myclock/txxclock/second.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.600 ns) 5.500 ns second:inst\|s1~29 3 COMB LC1_B2 3 " "Info: 3: + IC(1.000 ns) + CELL(1.600 ns) = 5.500 ns; Loc. = LC1_B2; Fanout = 3; COMB Node = 'second:inst\|s1~29'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.600 ns" { second:inst|sec1[3] second:inst|s1~29 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.300 ns) + CELL(1.400 ns) 9.200 ns selector:inst5\|y~37 4 COMB LC4_F6 8 " "Info: 4: + IC(2.300 ns) + CELL(1.400 ns) = 9.200 ns; Loc. = LC4_F6; Fanout = 8; COMB Node = 'selector:inst5\|y~37'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.700 ns" { second:inst|s1~29 selector:inst5|y~37 } "NODE_NAME" } } { "selector.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector.vhd" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(0.500 ns) 11.300 ns minute:inst1\|sec1\[1\] 5 REG LC2_F11 5 " "Info: 5: + IC(1.600 ns) + CELL(0.500 ns) = 11.300 ns; Loc. = LC2_F11; Fanout = 5; REG Node = 'minute:inst1\|sec1\[1\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.100 ns" { selector:inst5|y~37 minute:inst1|sec1[1] } "NODE_NAME" } } { "minute.vhd" "" { Text "E:/study/EDA/myclock/txxclock/minute.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.700 ns) 13.300 ns minute:inst1\|s1~29 6 COMB LC4_F11 3 " "Info: 6: + IC(0.300 ns) + CELL(1.700 ns) = 13.300 ns; Loc. = LC4_F11; Fanout = 3; COMB Node = 'minute:inst1\|s1~29'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.000 ns" { minute:inst1|sec1[1] minute:inst1|s1~29 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(1.400 ns) 16.000 ns selector:inst8\|y~37 7 COMB LC1_F8 9 " "Info: 7: + IC(1.300 ns) + CELL(1.400 ns) = 16.000 ns; Loc. = LC1_F8; Fanout = 9; COMB Node = 'selector:inst8\|y~37'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.700 ns" { minute:inst1|s1~29 selector:inst8|y~37 } "NODE_NAME" } } { "selector.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector.vhd" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.700 ns) + CELL(0.000 ns) 19.700 ns hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 8 REG LC8_F4 6 " "Info: 8: + IC(3.700 ns) + CELL(0.000 ns) = 19.700 ns; Loc. = LC8_F4; Fanout = 6; REG Node = 'hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.700 ns" { selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.100 ns ( 46.19 % ) " "Info: Total cell delay = 9.100 ns ( 46.19 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.600 ns ( 53.81 % ) " "Info: Total interconnect delay = 10.600 ns ( 53.81 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "19.700 ns" { lHZCLK second:inst|sec1[3] second:inst|s1~29 selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "19.700 ns" { lHZCLK lHZCLK~out second:inst|sec1[3] second:inst|s1~29 selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.000ns 2.300ns 1.600ns 0.300ns 1.300ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.600ns 1.400ns 0.500ns 1.700ns 1.400ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "lHZCLK source 18.300 ns - Shortest register " "Info: - Shortest clock path from clock \"lHZCLK\" to source register is 18.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns lHZCLK 1 CLK PIN_55 9 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 9; CLK Node = 'lHZCLK'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { lHZCLK } "NODE_NAME" } } { "txxclock.bdf" "" { Schematic "E:/study/EDA/myclock/txxclock/txxclock.bdf" { { 256 -160 8 272 "lHZCLK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns second:inst\|sec1\[2\] 2 REG LC8_B2 4 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC8_B2; Fanout = 4; REG Node = 'second:inst\|sec1\[2\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { lHZCLK second:inst|sec1[2] } "NODE_NAME" } } { "second.vhd" "" { Text "E:/study/EDA/myclock/txxclock/second.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 4.600 ns second:inst\|s1~29 3 COMB LC1_B2 3 " "Info: 3: + IC(0.300 ns) + CELL(1.400 ns) = 4.600 ns; Loc. = LC1_B2; Fanout = 3; COMB Node = 'second:inst\|s1~29'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { second:inst|sec1[2] second:inst|s1~29 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.300 ns) + CELL(1.400 ns) 8.300 ns selector:inst5\|y~37 4 COMB LC4_F6 8 " "Info: 4: + IC(2.300 ns) + CELL(1.400 ns) = 8.300 ns; Loc. = LC4_F6; Fanout = 8; COMB Node = 'selector:inst5\|y~37'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.700 ns" { second:inst|s1~29 selector:inst5|y~37 } "NODE_NAME" } } { "selector.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector.vhd" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.500 ns) 9.100 ns minute:inst1\|sec1\[3\] 5 REG LC3_F6 4 " "Info: 5: + IC(0.300 ns) + CELL(0.500 ns) = 9.100 ns; Loc. = LC3_F6; Fanout = 4; REG Node = 'minute:inst1\|sec1\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.800 ns" { selector:inst5|y~37 minute:inst1|sec1[3] } "NODE_NAME" } } { "minute.vhd" "" { Text "E:/study/EDA/myclock/txxclock/minute.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.200 ns) + CELL(1.600 ns) 11.900 ns minute:inst1\|s1~29 6 COMB LC4_F11 3 " "Info: 6: + IC(1.200 ns) + CELL(1.600 ns) = 11.900 ns; Loc. = LC4_F11; Fanout = 3; COMB Node = 'minute:inst1\|s1~29'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.800 ns" { minute:inst1|sec1[3] minute:inst1|s1~29 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(1.400 ns) 14.600 ns selector:inst8\|y~37 7 COMB LC1_F8 9 " "Info: 7: + IC(1.300 ns) + CELL(1.400 ns) = 14.600 ns; Loc. = LC1_F8; Fanout = 9; COMB Node = 'selector:inst8\|y~37'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.700 ns" { minute:inst1|s1~29 selector:inst8|y~37 } "NODE_NAME" } } { "selector.vhd" "" { Text "E:/study/EDA/myclock/txxclock/selector.vhd" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.700 ns) + CELL(0.000 ns) 18.300 ns hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 8 REG LC8_F4 6 " "Info: 8: + IC(3.700 ns) + CELL(0.000 ns) = 18.300 ns; Loc. = LC8_F4; Fanout = 6; REG Node = 'hour:inst2\|lpm_counter:sec2_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.700 ns" { selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.800 ns ( 48.09 % ) " "Info: Total cell delay = 8.800 ns ( 48.09 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.500 ns ( 51.91 % ) " "Info: Total interconnect delay = 9.500 ns ( 51.91 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "18.300 ns" { lHZCLK second:inst|sec1[2] second:inst|s1~29 selector:inst5|y~37 minute:inst1|sec1[3] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "18.300 ns" { lHZCLK lHZCLK~out second:inst|sec1[2] second:inst|s1~29 selector:inst5|y~37 minute:inst1|sec1[3] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 0.300ns 2.300ns 0.300ns 1.200ns 1.300ns 3.700ns } { 0.000ns 2.000ns 0.500ns 1.400ns 1.400ns 0.500ns 1.600ns 1.400ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "19.700 ns" { lHZCLK second:inst|sec1[3] second:inst|s1~29 selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "19.700 ns" { lHZCLK lHZCLK~out second:inst|sec1[3] second:inst|s1~29 selector:inst5|y~37 minute:inst1|sec1[1] minute:inst1|s1~29 selector:inst8|y~37 hour:inst2|lpm_counter:sec2_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.000ns 2.300ns 1.600ns 0.300ns 1.300ns 3.700ns } {