cy8c29466_test.lst

来自「塞扑拉思 psoc spi模块 作为master 的应用程序.」· LST 代码 · 共 923 行 · 第 1/5 页

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00EB: 3F 07    MVI   [__r0],A      (0479)     mvi   [__r0], A                    ; Transfer the data to RAM
00ED: 47 07 FF TST   [7],255       (0480)     tst   [__r0], 0xff                 ; Check for page crossing
00F0: B0 06    JNZ   0x00F7        (0481)     jnz   .CopyLoopTail                ;   No crossing, keep going
00F2: 5D D5    MOV   A,REG[213]    (0482)     mov   A, reg[ MVW_PP]              ;   If crossing, bump MVW page reg
00F4: 74       INC   A             (0483)     inc   A
00F5: 60 D5    MOV   REG[213],A    (0484)     mov   reg[ MVW_PP], A
                                   (0485) .CopyLoopTail:
00F7: 18       POP   A             (0486)     pop   A                            ; restore pXIData to [A,X]
00F8: 7A 06    DEC   [__r1]        (0487)     dec   [__r1]                       ; End of this array in flash?
00FA: BF EB    JNZ   0x00E6        (0488)     jnz   .CopyNextByteLoop            ;   No,  more bytes to copy
00FC: 8F C9    JMP   0x00C6        (0489)     jmp   .AccessNextStructLoop        ;   Yes, initialize another RAM block
                                   (0490) 
                                   (0491) .ClearRAMBlockToZero:
00FE: 18       POP   A             (0492)     pop   A                            ; restore pXIData to [A,X]
00FF: 75       INC   X             (0493)     inc   X                            ; pXIData++ (point to next data byte)
0100: 09 00    ADC   A,0           (0494)     adc   A, 0
0102: 08       PUSH  A             (0495)     push  A
0103: 28       ROMX                (0496)     romx                               ; Get the run length (CPU.A <- *pXIData)
0104: 53 06    MOV   [__r1],A      (0497)     mov   [__r1], A                    ; Initialize downcounter
0106: 50 00    MOV   A,0           (0498)     mov   A, 0                         ; Initialize source data
                                   (0499) 
                                   (0500) .ClearRAMBlockLoop:
                                   (0501)     ; Assert: [reg[MVW_PP],[__r0]] points to next RAM destination and
                                   (0502)     ;         __r1 holds a non-zero count of the number of bytes remaining.
                                   (0503)     ;
0108: 3F 07    MVI   [__r0],A      (0504)     mvi   [__r0], A                    ; Clear a byte
010A: 47 07 FF TST   [7],255       (0505)     tst   [__r0], 0xff                 ; Check for page crossing
010D: B0 08    JNZ   0x0116        (0506)     jnz   .ClearLoopTail               ;   No crossing, keep going
010F: 5D D5    MOV   A,REG[213]    (0507)     mov   A, reg[ MVW_PP]              ;   If crossing, bump MVW page reg
0111: 74       INC   A             (0508)     inc   A
0112: 60 D5    MOV   REG[213],A    (0509)     mov   reg[ MVW_PP], A
0114: 50 00    MOV   A,0           (0510)     mov   A, 0                         ; Restore the zero used for clearing
                                   (0511) .ClearLoopTail:
0116: 7A 06    DEC   [__r1]        (0512)     dec   [__r1]                       ; Was this the last byte?
0118: BF EF    JNZ   0x0108        (0513)     jnz   .ClearRAMBlockLoop           ;   No,  continue
011A: 18       POP   A             (0514)     pop   A                            ;   Yes, restore pXIData to [A,X] and
011B: 8F AA    JMP   0x00C6        (0515)     jmp   .AccessNextStructLoop        ;        initialize another RAM block
                                   (0516) 
                                   (0517) .C_RTE_WrapUp:
011D: 18       POP   A             (0518)     pop   A                            ; balance stack
                                   (0519) 
                                   (0520) ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
                                   (0521) 
                                   (0522) C_RTE_Done:
                                   (0523) 
                                   (0524) ENDIF ; C_LANGUAGE_SUPPORT
                                   (0525) 
                                   (0526)     ;-------------------------------
                                   (0527)     ; Voltage Stabilization for SMP
                                   (0528)     ;-------------------------------
                                   (0529) 
                                   (0530) IF ( POWER_SETTING & POWER_SET_5V0)    ; 5.0V Operation
                                   (0531) IF ( SWITCH_MODE_PUMP ^ 1 )            ; SMP is operational
                                   (0532)     ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
                                   (0533)     ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to
                                   (0534)     ; 5V before enabling the Precision Power-On Reset (PPOR).
                                   (0535)     ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
                                   (0536)     or   reg[INT_MSK0],INT_MSK0_SLEEP
                                   (0537)     M8C_SetBank1
                                   (0538)     and   reg[OSC_CR0], ~OSC_CR0_SLEEP
                                   (0539)     or    reg[OSC_CR0],  OSC_CR0_SLEEP_512Hz
                                   (0540)     M8C_SetBank0
                                   (0541)     M8C_ClearWDTAndSleep                   ; Restart the sleep timer
                                   (0542)     mov   reg[INT_VC], 0                   ; Clear all pending interrupts
                                   (0543) .WaitFor2ms:
                                   (0544)     tst   reg[INT_CLR0], INT_MSK0_SLEEP    ; Test the SleepTimer Interrupt Status
                                   (0545)     jz   .WaitFor2ms                       ; Branch fails when 2 msec has passed
                                   (0546) ENDIF ; SMP is operational
                                   (0547) ENDIF ; 5.0V Operation
                                   (0548) 
                                   (0549)     ;-------------------------------
                                   (0550)     ; Set Power-On Reset (POR) Level
                                   (0551)     ;-------------------------------
011E: 71 10    OR    F,16          (0552)     M8C_SetBank1
                                   (0553) 
                                   (0554) IF (POWER_SETTING & POWER_SET_5V0)          ; 5.0V Operation?
                                   (0555)  IF (POWER_SETTING & POWER_SET_SLOW_IMO)    ; and Slow Mode?
                                   (0556)  ELSE                                       ;    No, fast mode
                                   (0557)   IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ;    As fast as 24MHz?
                                   (0558)                                             ;       no, set midpoint POR in user code, if desired
                                   (0559)   ELSE ; 24HMz                              ;
                                   (0560)     or    reg[VLT_CR],  VLT_CR_POR_HIGH     ;      yes, highest POR trip point required
                                   (0561)   ENDIF ; 24MHz
                                   (0562)  ENDIF ; Slow Mode
                                   (0563) ENDIF ; 5.0V Operation
                                   (0564) 
0120: 70 EF    AND   F,239         (0565)     M8C_SetBank0
                                   (0566) 
                                   (0567)     ;----------------------------
                                   (0568)     ; Wrap up and invoke "main"
                                   (0569)     ;----------------------------
                                   (0570) 
                                   (0571)     ; Disable the Sleep interrupt that was used for timing above.  In fact,
                                   (0572)     ; no interrupts should be enabled now, so may as well clear the register.
                                   (0573)     ;
0122: 62 E0 00 MOV   REG[224],0    (0574)     mov  reg[INT_MSK0],0
                                   (0575) 
                                   (0576)     ; Everything has started OK. Now select requested CPU & sleep frequency.
                                   (0577)     ; And put decimator in full mode so it does not consume too much current.
                                   (0578)     ;
0125: 71 10    OR    F,16          (0579)     M8C_SetBank1
0127: 62 E0 00 MOV   REG[224],0    (0580)     mov  reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST)
012A: 43 E7 80 OR    REG[231],128  (0581)     or   reg[DEC_CR2],80h                    ; Put decimator in full mode
012D: 70 EF    AND   F,239         (0582)     M8C_SetBank0
                                   (0583) 
                                   (0584)     ; Global Interrupt are NOT enabled, this should be done in main().
                                   (0585)     ; LVD is set but will not occur unless Global Interrupts are enabled.
                                   (0586)     ; Global Interrupts should be enabled as soon as possible in main().
                                   (0587)     ;
012F: 62 E2 00 MOV   REG[226],0    (0588)     mov  reg[INT_VC],0             ; Clear any pending interrupts which may
                                   (0589)                                    ; have been set during the boot process.
                                   (0590) IF ENABLE_LJMP_TO_MAIN
                                   (0591)     ljmp  _main                    ; goto main (no return)
                                   (0592) ELSE
0132: 7C 03 73 LCALL _main         (0593)     lcall _main                    ; call main
                                   (0594) .Exit:
0135: 8F FF    JMP   0x0135        (0595)     jmp  .Exit                     ; Wait here after return till power-off or reset
                                   (0596) ENDIF
                                   (0597) 
                                   (0598)     ;---------------------------------
                                   (0599)     ; Library Access to Global Parms
                                   (0600)     ;---------------------------------
                                   (0601)     ;
                                   (0602)  bGetPowerSetting:
                                   (0603) _bGetPowerSetting:
                                   (0604)     ; Returns value of POWER_SETTING in the A register.
                                   (0605)     ; No inputs. No Side Effects.
                                   (0606)     ;
0137: 50 10    MOV   A,16          (0607)     mov   A, POWER_SETTING
0139: 7F       RET                 (0608)     ret
013A: 30       HALT  
013B: 30       HALT  
013C: 30       HALT  
013D: 30       HALT  
013E: 30       HALT  
013F: 30       HALT  
0140: 30       HALT  
0141: 30       HALT  
0142: 30       HALT  
0143: 30       HALT  
0144: 30       HALT  
0145: 30       HALT  
0146: 30       HALT  
0147: 30       HALT  
0148: 30       HALT  
0149: 30       HALT  
014A: 30       HALT  
014B: 30       HALT  
014C: 30       HALT  
014D: 30       HALT  
014E: 30       HALT  
014F: 30       HALT  
0150: 30       HALT  
0151: 30       HALT  
0152: 30       HALT  
0153: 30       HALT  
0154: 30       HALT  
0155: 30       HALT  
0156: 30       HALT  
0157: 30       HALT  
0158: 30       HALT  
0159: 30       HALT  
015A: 30       HALT  
015B: 30       HALT  
015C: 30       HALT  
015D: 30       HALT  
015E: 30       HALT  
015F: 30       HALT  
0160: 30       HALT  
0161: 30       HALT  
0162: 30       HALT  
0163: 30       HALT  
0164: 30       HALT  
0165: 30       HALT  
0166: 30       HALT  
0167: 30       HALT  
0168: 30       HALT  
0169: 30       HALT  
016A: 30       HALT  
016B: 30       HALT  
016C: 30       HALT  
016D: 30       HALT  
016E: 30       HALT  
016F: 30       HALT  
0170: 30       HALT  

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