cy8c29466_test.lst
来自「塞扑拉思 psoc spi模块 作为master 的应用程序.」· LST 代码 · 共 923 行 · 第 1/5 页
LST
923 行
0000: 80 67 JMP 0x0068
0002: 30 HALT
0003: 30 HALT
FILE: .\boot.asm
(0001) ; Generated by PSoC Designer ver 4.3 b1884 : 23 June, 2006
(0002) ;
(0003) ;@Id: boot.tpl#103 @
(0004) ;=============================================================================
(0005) ; FILENAME: boot.asm
(0006) ; VERSION: 4.16
(0007) ; DATE: 6 October 2005
(0008) ;
(0009) ; DESCRIPTION:
(0010) ; M8C Boot Code for CY8C29xxx microcontroller family.
(0011) ;
(0012) ; Copyright (C) Cypress Semiconductor 2000-2005. All rights reserved.
(0013) ;
(0014) ; NOTES:
(0015) ; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in
(0016) ; the project's root directory to create BOOT.ASM. Any changes made to
(0017) ; BOOT.ASM will be overwritten every time the project is generated; therfore
(0018) ; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when
(0019) ; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME)
(0020) ; are not accidentally modified.
(0021) ;
(0022) ;=============================================================================
(0023)
(0024) include ".\lib\GlobalParams.inc"
(0025) include "m8c.inc"
(0026) include "m8ssc.inc"
(0027) include "memory.inc"
(0028)
(0029) ;--------------------------------------
(0030) ; Export Declarations
(0031) ;--------------------------------------
(0032)
(0033) export __Start
(0034) export __bss_start
(0035) export __data_start
(0036) export __idata_start
(0037) export __func_lit_start
(0038) export __text_start
(0039) export _bGetPowerSetting
(0040) export bGetPowerSetting
(0041)
(0042)
(0043) ;--------------------------------------
(0044) ; Optimization flags
(0045) ;--------------------------------------
(0046) ;
(0047) ; To change the value of these flags, modify the file boot.tpl, not
(0048) ; boot.asm. See the notes in the banner comment at the beginning of
(0049) ; this file.
(0050)
(0051) ; Optimization for Assembly language (only) projects and C-language projects
(0052) ; that do not depend on the C compiler to initialize the values of RAM variables.
(0053) ; Set to 1: Support for C Run-time Environment initialization
(0054) ; Set to 0: Support for C not included. Faster start up, smaller code space.
(0055) ;
(0056) C_LANGUAGE_SUPPORT: equ 1
(0057)
(0058)
(0059) ; The following equate is required for proper operation. Reseting its value
(0060) ; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is
(0061) ; selected. If the designer chooses to not wait then stabilization of the ECO
(0062) ; and PLL_Lock must take place within user code. See the family data sheet for
(0063) ; the requirements of starting the ECO and PLL lock mode.
(0064) ;
(0065) ; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before
(0066) ; invoking main
(0067) ; Set to 0: Boot code does not wait; clock may not have stabilized by
(0068) ; the time code in main starts executing.
(0069) ;
(0070) WAIT_FOR_32K: equ 1
(0071)
(0072)
(0073) ; For historical reasons, by default the boot code uses an lcall instruction
(0074) ; to invoke the user's _main code. If _main executes a return instruction,
(0075) ; boot provides an infinite loop. By changing the following equate from zero
(0076) ; to 1, boot's lcall will be replaced by a ljmp instruction, saving two
(0077) ; bytes on the stack which are otherwise required for the return address. If
(0078) ; this option is enabled, _main must not return. (Beginning with the 4.2
(0079) ; release, the C compiler automatically places an infinite loop at the end
(0080) ; of main, rather than a return instruction.)
(0081) ;
(0082) ENABLE_LJMP_TO_MAIN: equ 0
(0083)
(0084)
(0085) ;-----------------------------------------------------------------------------
(0086) ; Interrupt Vector Table
(0087) ;-----------------------------------------------------------------------------
(0088) ;
(0089) ; Interrupt vector table entries are 4 bytes long. Each one contains
(0090) ; a jump instruction to an ISR (Interrupt Service Routine), although
(0091) ; very short ISRs could be encoded within the table itself. Normally,
(0092) ; vector jump targets are modified automatically according to the user
(0093) ; modules selected. This occurs when the 'Generate Application' opera-
(0094) ; tion is run causing PSoC Designer to create boot.asm and the other
(0095) ; configuration files. If you need to hard code a vector, update the
(0096) ; file boot.tpl, not boot.asm. See the banner comment at the beginning
(0097) ; of this file.
(0098) ;-----------------------------------------------------------------------------
(0099)
(0100) AREA TOP (ROM, ABS, CON)
(0101)
(0102) org 0 ;Reset Interrupt Vector
(0103) jmp __Start ;First instruction executed following a Reset
(0104)
(0105) org 04h ;Supply Monitor Interrupt Vector
0004: 30 HALT (0106) halt ;Stop execution if power falls too low
0005: 30 HALT
0006: 30 HALT
0007: 30 HALT
(0107)
(0108) org 08h ;Analog Column 0 Interrupt Vector
(0109) // call void_handler
0008: 7E RETI (0110) reti
0009: 30 HALT
000A: 30 HALT
000B: 30 HALT
(0111)
(0112) org 0Ch ;Analog Column 1 Interrupt Vector
(0113) // call void_handler
000C: 7E RETI (0114) reti
000D: 30 HALT
000E: 30 HALT
000F: 30 HALT
(0115)
(0116) org 10h ;Analog Column 2 Interrupt Vector
(0117) // call void_handler
0010: 7E RETI (0118) reti
0011: 30 HALT
0012: 30 HALT
0013: 30 HALT
(0119)
(0120) org 14h ;Analog Column 3 Interrupt Vector
(0121) // call void_handler
0014: 7E RETI (0122) reti
0015: 30 HALT
0016: 30 HALT
0017: 30 HALT
(0123)
(0124) org 18h ;VC3 Interrupt Vector
(0125) // call void_handler
0018: 7E RETI (0126) reti
0019: 30 HALT
001A: 30 HALT
001B: 30 HALT
(0127)
(0128) org 1Ch ;GPIO Interrupt Vector
(0129) // call void_handler
001C: 7E RETI (0130) reti
001D: 30 HALT
001E: 30 HALT
001F: 30 HALT
(0131)
(0132) org 20h ;PSoC Block DBB00 Interrupt Vector
(0133) // call void_handler
0020: 7E RETI (0134) reti
0021: 30 HALT
0022: 30 HALT
0023: 30 HALT
(0135)
(0136) org 24h ;PSoC Block DBB01 Interrupt Vector
(0137) // call void_handler
0024: 7E RETI (0138) reti
0025: 30 HALT
0026: 30 HALT
0027: 30 HALT
(0139)
(0140) org 28h ;PSoC Block DCB02 Interrupt Vector
0028: 7D 03 58 LJMP 0x0358 (0141) ljmp _SPIM_ISR
002B: 7E RETI (0142) reti
(0143)
(0144) org 2Ch ;PSoC Block DCB03 Interrupt Vector
(0145) // call void_handler
002C: 7E RETI (0146) reti
002D: 30 HALT
002E: 30 HALT
002F: 30 HALT
(0147)
(0148) org 30h ;PSoC Block DBB10 Interrupt Vector
(0149) // call void_handler
0030: 7E RETI (0150) reti
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