parity_verifier.hier_info

来自「基于FPGA的uart控制器」· HIER_INFO 代码 · 共 13 行

|parity_verifier
source[0] => check~0.IN1
source[1] => check~0.IN0
source[2] => check~1.IN0
source[3] => check~2.IN0
source[4] => check~3.IN0
source[5] => check~4.IN0
source[6] => check~5.IN0
source[7] => check~6.IN0
parity <= check~6.DB_MAX_OUTPUT_PORT_TYPE