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📄 alureg.fit

📁 简单的CPU设计数字系统实验
💻 FIT
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-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 10/03/2007 19:32:30      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "alureg"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "ALU_BUS"                      : INPUT_PIN  = 3      ;
    "CLKJP"                        : INPUT_PIN  = 1      ;
    "DP"                           : INPUT_PIN  = 51     ;
    "in0"                          : INPUT_PIN  = 11     ;
    "in1"                          : INPUT_PIN  = 65     ;
    "in2"                          : INPUT_PIN  = 22     ;
    "in3"                          : INPUT_PIN  = 71     ;
    "in4"                          : INPUT_PIN  = 35     ;
    "in5"                          : INPUT_PIN  = 38     ;
    "in6"                          : INPUT_PIN  = 37     ;
    "in7"                          : INPUT_PIN  = 73     ;
    "LDDR1"                        : INPUT_PIN  = 72     ;
    "LDDR2"                        : INPUT_PIN  = 83     ;
    "LDR0"                         : INPUT_PIN  = 81     ;
    "LDR1"                         : INPUT_PIN  = 52     ;
    "LDR2"                         : INPUT_PIN  = 79     ;
    "LDR3"                         : INPUT_PIN  = 53     ;
    "QD"                           : INPUT_PIN  = 80     ;
    "r_bus"                        : INPUT_PIN  = 23     ;
    "sa0"                          : INPUT_PIN  = 42     ;
    "sa1"                          : INPUT_PIN  = 6      ;
    "sb0"                          : INPUT_PIN  = 44     ;
    "sb1"                          : INPUT_PIN  = 5      ;
    "SW_BUS"                       : INPUT_PIN  = 21     ;
    "s0"                           : INPUT_PIN  = 43     ;
    "s1"                           : INPUT_PIN  = 84     ;
    "s2"                           : INPUT_PIN  = 9      ;
    "tj"                           : INPUT_PIN  = 2      ;
    "CN4"                          : OUTPUT_PIN = 16     ;
    "R0_0"                         : OUTPUT_PIN = 61     ;
    "R0_1"                         : OUTPUT_PIN = 58     ;
    "R0_2"                         : OUTPUT_PIN = 60     ;
    "R0_3"                         : OUTPUT_PIN = 50     ;
    "R0_4"                         : OUTPUT_PIN = 36     ;
    "R0_5"                         : OUTPUT_PIN = 62     ;
    "R0_6"                         : OUTPUT_PIN = 29     ;
    "R0_7"                         : OUTPUT_PIN = 59     ;
    "t1"                           : OUTPUT_PIN = 30     ;
    "t2"                           : OUTPUT_PIN = 70     ;
    "t3"                           : OUTPUT_PIN = 66     ;
    "t4"                           : OUTPUT_PIN = 78     ;
    "D0"                           : BIDIR_PIN  = 28     ;
    "D1"                           : BIDIR_PIN  = 64     ;
    "D2"                           : BIDIR_PIN  = 67     ;
    "D3"                           : BIDIR_PIN  = 17     ;
    "D4"                           : BIDIR_PIN  = 19     ;
    "D5"                           : BIDIR_PIN  = 18     ;
    "D6"                           : BIDIR_PIN  = 27     ;
    "D7"                           : BIDIR_PIN  = 7      ;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|pcarry1" : LOCATION   = LC7_B11;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|pcarry2" : LOCATION   = LC4_B11;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|pcarry3" : LOCATION   = LC8_A4 ;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|pcarry4" : LOCATION   = LC4_A6 ;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|pcarry5" : LOCATION   = LC2_A12;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|~156~1" : LOCATION   = LC5_B14;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|:158" : LOCATION   = LC5_A4 ;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|:159" : LOCATION   = LC2_A6 ;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|:160" : LOCATION   = LC5_A12;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|:161" : LOCATION   = LC4_A11;
    "|alu:3|LPM_ADD_SUB:5|addcore:adder|:162" : LOCATION   = LC5_A5 ;
    "|alu:3|LPM_ADD_SUB:5|:153"    : LOCATION   = LC3_A5 ;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|pcarry1" : LOCATION   = LC3_B11;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|pcarry2" : LOCATION   = LC2_B11;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|pcarry3" : LOCATION   = LC2_A11;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|pcarry4" : LOCATION   = LC8_A11;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|pcarry5" : LOCATION   = LC3_A12;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|:156" : LOCATION   = LC3_B14;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|:158" : LOCATION   = LC4_A4 ;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|:159" : LOCATION   = LC1_A11;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|:160" : LOCATION   = LC4_A12;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|:161" : LOCATION   = LC3_A11;
    "|alu:3|LPM_ADD_SUB:44|addcore:adder|:162" : LOCATION   = LC4_A5 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:128" : LOCATION   = LC7_B12;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~148~1" : LOCATION   = LC3_B18;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~149~1" : LOCATION   = LC6_B18;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~150~1" : LOCATION   = LC5_B13;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~151~1" : LOCATION   = LC5_A19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~152~1" : LOCATION   = LC1_A16;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:153" : LOCATION   = LC2_A7 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:154" : LOCATION   = LC3_A8 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:166" : LOCATION   = LC3_B12;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:168" : LOCATION   = LC7_B19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:319" : LOCATION   = LC8_B18;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:320" : LOCATION   = LC1_B19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~320~1" : LOCATION   = LC8_B19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:321" : LOCATION   = LC6_A19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:322" : LOCATION   = LC2_A19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:323" : LOCATION   = LC5_A16;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:324" : LOCATION   = LC1_A7 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:121" : LOCATION   = LC1_B12;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:140" : LOCATION   = LC6_B12;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~140~1" : LOCATION   = LC2_B5 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:142" : LOCATION   = LC4_B18;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:143" : LOCATION   = LC2_B13;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:144" : LOCATION   = LC2_A24;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~144~1" : LOCATION   = LC4_A24;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~145~1" : LOCATION   = LC7_A19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:146" : LOCATION   = LC3_A7 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:147" : LOCATION   = LC8_A8 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:148" : LOCATION   = LC5_A8 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:157" : LOCATION   = LC5_B12;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:158" : LOCATION   = LC2_B12;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:159" : LOCATION   = LC7_B5 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~302~1" : LOCATION   = LC4_B12;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:303" : LOCATION   = LC7_B18;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~303~1" : LOCATION   = LC6_B5 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:305" : LOCATION   = LC8_B13;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:306" : LOCATION   = LC5_A24;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:307" : LOCATION   = LC4_A19;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:308" : LOCATION   = LC5_A7 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:309" : LOCATION   = LC4_A8 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:310" : LOCATION   = LC8_A9 ;
    "|alu:3|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~132~1" : LOCATION   = LC8_B2 ;

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