shutong.fit

来自「简单的CPU设计数字系统实验」· FIT 代码 · 共 661 行 · 第 1/5 页

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 10/15/2007 22:41:32      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "shutong"
BEGIN

    DEVICE = "EPF10K10TC144-3";

    "alu_bus"                      : INPUT_PIN  = 28     ;
    "in"                           : INPUT_PIN  = 10     ;
    "in0"                          : INPUT_PIN  = 133    ;
    "in1"                          : INPUT_PIN  = 60     ;
    "in2"                          : INPUT_PIN  = 122    ;
    "in3"                          : INPUT_PIN  = 59     ;
    "in4"                          : INPUT_PIN  = 117    ;
    "in5"                          : INPUT_PIN  = 132    ;
    "in6"                          : INPUT_PIN  = 136    ;
    "in7"                          : INPUT_PIN  = 44     ;
    "ldar"                         : INPUT_PIN  = 11     ;
    "lddr1"                        : INPUT_PIN  = 114    ;
    "lddr2"                        : INPUT_PIN  = 113    ;
    "ldr0"                         : INPUT_PIN  = 37     ;
    "ldr1"                         : INPUT_PIN  = 36     ;
    "ldr2"                         : INPUT_PIN  = 137    ;
    "ldr3"                         : INPUT_PIN  = 130    ;
    "out"                          : INPUT_PIN  = 39     ;
    "pc_bus"                       : INPUT_PIN  = 131    ;
    "r_bus"                        : INPUT_PIN  = 41     ;
    "rd"                           : INPUT_PIN  = 143    ;
    "sel_dr10"                     : INPUT_PIN  = 126    ;
    "sel_dr11"                     : INPUT_PIN  = 42     ;
    "sel_dr20"                     : INPUT_PIN  = 124    ;
    "sel_dr21"                     : INPUT_PIN  = 18     ;
    "sw_bus"                       : INPUT_PIN  = 101    ;
    "s0"                           : INPUT_PIN  = 56     ;
    "s1"                           : INPUT_PIN  = 125    ;
    "s2"                           : INPUT_PIN  = 82     ;
    "t1"                           : INPUT_PIN  = 55     ;
    "t2"                           : INPUT_PIN  = 99     ;
    "t3"                           : INPUT_PIN  = 142    ;
    "we"                           : INPUT_PIN  = 121    ;
    "161clrn"                      : INPUT_PIN  = 54     ;
    "161load"                      : INPUT_PIN  = 65     ;
    "161pc"                        : INPUT_PIN  = 96     ;
    "ADR0"                         : OUTPUT_PIN = 118    ;
    "ADR1"                         : OUTPUT_PIN = 68     ;
    "ADR2"                         : OUTPUT_PIN = 97     ;
    "ADR3"                         : OUTPUT_PIN = 86     ;
    "ADR4"                         : OUTPUT_PIN = 67     ;
    "ADR5"                         : OUTPUT_PIN = 87     ;
    "ADR6"                         : OUTPUT_PIN = 89     ;
    "ADR7"                         : OUTPUT_PIN = 119    ;
    "cout"                         : OUTPUT_PIN = 30     ;
    "r0"                           : OUTPUT_PIN = 17     ;
    "r1"                           : OUTPUT_PIN = 73     ;
    "r2"                           : OUTPUT_PIN = 140    ;
    "r3"                           : OUTPUT_PIN = 111    ;
    "r4"                           : OUTPUT_PIN = 109    ;
    "r5"                           : OUTPUT_PIN = 21     ;
    "r6"                           : OUTPUT_PIN = 48     ;
    "r7"                           : OUTPUT_PIN = 20     ;
    "D0"                           : BIDIR_PIN  = 19     ;
    "D1"                           : BIDIR_PIN  = 91     ;
    "D2"                           : BIDIR_PIN  = 90     ;
    "D3"                           : BIDIR_PIN  = 92     ;
    "D4"                           : BIDIR_PIN  = 88     ;
    "D5"                           : BIDIR_PIN  = 27     ;
    "D6"                           : BIDIR_PIN  = 23     ;
    "D7"                           : BIDIR_PIN  = 22     ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|pcarry1" : LOCATION   = LC2_C4 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|pcarry2" : LOCATION   = LC5_C6 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|pcarry3" : LOCATION   = LC4_C6 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|pcarry4" : LOCATION   = LC1_C6 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|pcarry5" : LOCATION   = LC1_C22;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|:156" : LOCATION   = LC7_C4 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|:159" : LOCATION   = LC3_B8 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|:160" : LOCATION   = LC3_C22;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|addcore:adder|:162" : LOCATION   = LC5_C14;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:5|:153" : LOCATION   = LC3_C14;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|pcarry1" : LOCATION   = LC3_C4 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|pcarry2" : LOCATION   = LC1_C1 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|pcarry3" : LOCATION   = LC4_C11;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|pcarry4" : LOCATION   = LC3_C17;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|pcarry5" : LOCATION   = LC2_C17;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|:156" : LOCATION   = LC6_C4 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|:159" : LOCATION   = LC2_B8 ;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|:160" : LOCATION   = LC1_C17;
    "|alu_reg:101|alu:142|LPM_ADD_SUB:44|addcore:adder|:162" : LOCATION   = LC4_C14;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:128" : LOCATION   = LC8_A11;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~148~1" : LOCATION   = LC5_A2 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:149" : LOCATION   = LC6_C5 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~149~1" : LOCATION   = LC4_A5 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~150~1" : LOCATION   = LC3_C5 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~151~1" : LOCATION   = LC1_C3 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:152" : LOCATION   = LC4_C21;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:153" : LOCATION   = LC6_C21;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:154" : LOCATION   = LC5_C16;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:166" : LOCATION   = LC2_A11;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:319" : LOCATION   = LC8_A2 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:320" : LOCATION   = LC5_A5 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:321" : LOCATION   = LC7_C5 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:322" : LOCATION   = LC4_C3 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:323" : LOCATION   = LC5_C21;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:324" : LOCATION   = LC3_C21;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:140" : LOCATION   = LC7_A11;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:141" : LOCATION   = LC2_A2 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:142" : LOCATION   = LC1_A5 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:143" : LOCATION   = LC8_C5 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:144" : LOCATION   = LC3_C2 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:145" : LOCATION   = LC6_C3 ;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|:146" : LOCATION   = LC8_C23;
    "|alu_reg:101|alu:142|LPM_MULT:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|~146~1" : LOCATION   = LC2_C19;