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📄 cpumodel.rpt

📁 简单的CPU设计数字系统实验
💻 RPT
📖 第 1 页 / 共 5 页
字号:
|shutong:68|alu_reg:101|74273:128|
|shutong:68|alu_reg:101|74273:55|
|shutong:68|alu_reg:101|lpm_mux:63|
|shutong:68|alu_reg:101|lpm_mux:63|altshift:external_latency_ffs|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:94|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:112|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:130|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:148|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:166|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:184|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:202|
|shutong:68|alu_reg:101|lpm_mux:63|muxlut:220|
|shutong:68|alu_reg:101|lpm_mux:62|
|shutong:68|alu_reg:101|lpm_mux:62|altshift:external_latency_ffs|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:94|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:112|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:130|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:148|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:166|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:184|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:202|
|shutong:68|alu_reg:101|lpm_mux:62|muxlut:220|
|shutong:68|alu_reg:101|alu:142|
|shutong:68|alu_reg:101|alu:142|lpm_or:1|
|shutong:68|alu_reg:101|alu:142|lpm_and:2|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|altshift:external_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:94|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:112|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:130|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:148|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:166|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:184|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:202|
|shutong:68|alu_reg:101|alu:142|lpm_mux:3|muxlut:220|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|altshift:external_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:77|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:92|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:107|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:122|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:137|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:152|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:167|
|shutong:68|alu_reg:101|alu:142|lpm_mux:49|muxlut:182|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_cell:adder2|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_cell:adder1|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_cell:adder0|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder1|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_add:sub_csa_add|csa_cell:adder0|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|altshift:result_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|altshift:carry_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|altshift:oflow_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_mult:4|altshift:external_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:5|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:5|addcore:adder|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:5|altshift:result_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:5|altshift:carry_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:5|altshift:oflow_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:44|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:44|addcore:adder|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:44|altshift:result_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:44|altshift:carry_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_add_sub:44|altshift:oflow_ext_latency_ffs|
|shutong:68|alu_reg:101|alu:142|lpm_clshift:39|
|shutong:68|alu_reg:101|alu:142|mux:52|
|shutong:68|alu_reg:101|alu:142|mux:52|lpm_mux:31|
|shutong:68|alu_reg:101|alu:142|mux:52|lpm_mux:31|altshift:external_latency_ffs|
|shutong:68|alu_reg:101|alu:142|mux:52|lpm_mux:31|muxlut:42|
|kong_sim:100|
|kong_sim:100|74244:89|
|kong_sim:100|7474:56|
|kong_sim:100|7474:57|
|kong_sim:100|7474:58|
|kong_sim:100|74273:38|
|kong_sim:100|74273:39|
|kong_sim:100|74273:41|
|kong_sim:100|74273:40|
|kong_sim:100|rom:97|
|kong_sim:100|rom:97|or5:39|
|kong_sim:100|rom:97|cpurom:85|
|kong_sim:100|rom:97|modif:86|
|kong_sim:100|jie:101|
|kong_sim:100|jie:101|74175:42|
|kong_sim:100|jie:101|7474:41|
|kong_sim:100|jie:101|7474:40|
|kong_sim:100|jie:101|7404:53|
|kong_sim:100|and5:102|
|save_z:108|


Device-Specific Information:                                f:\md\cpumodel.rpt
cpumodel

***** Logic for device 'cpumodel' compiled without errors.




Device: EPF10K20TC144-3

FLEX 10K Configuration Scheme: Passive Serial

Device Options:
    User-Supplied Start-Up Clock               = OFF
    Auto-Restart Configuration on Frame Error  = OFF
    Release Clears Before Tri-States           = OFF
    Enable Chip_Wide Reset                     = OFF
    Enable Chip-Wide Output Enable             = OFF
    Enable INIT_DONE Output                    = OFF
    JTAG User Code                             = 7f
    MultiVolt I/O                              = OFF

                                                                                         
                                                                                         
                  R R R R   R R       R R R R               R   R R R R R   R R R R R R  
                  E E E E   E E       E E E E               E   E E E E E   E E E E E E  
                  S S S S   S S       S S S S     G G G G V S   S S S S S   S S S S S S  
                  E E E E G E E     V E E E E G C N N N N C E   E E E E E V E E E E E E  
                  R R R R N R R     C R R R R N L D D D D C R   R R R R R C R R R R R R  
                  V V V V D V V   o C V V V V D K I I I I I V   V V V V V C V V V V V V  
                t E E E E I E E t u I E E E E I J N N N N N E r E E E E E I E E E E E E  
                4 D D D D O D D 3 t O D D D D O P T T T T T D 7 D D D D D O D D D D D D  
              --------------------------------------------------------------------------_ 
             / 144 142 140 138 136 134 132 130 128 126 124 122 120 118 116 114 112 110   |_ 
            /    143 141 139 137 135 133 131 129 127 125 123 121 119 117 115 113 111 109    | 
      #TCK |  1                                                                         108 | ^DATA0 
^CONF_DONE |  2                                                                         107 | ^DCLK 
     ^nCEO |  3                                                                         106 | ^nCE 
      #TDO |  4                                                                         105 | #TDI 
     VCCIO |  5                                                                         104 | GNDIO 
    VCCINT |  6                                                                         103 | GNDINT 
  RESERVED |  7                                                                         102 | r1 
  RESERVED |  8                                                                         101 | RESERVED 
        a0 |  9                                                                         100 | r0 
        a1 | 10                                                                          99 | t2 
  RESERVED | 11                                                                          98 | RESERVED 
        a2 | 12                                                                          97 | RESERVED 
        a3 | 13                                                                          96 | p1 
  RESERVED | 14                                                                          95 | r4 
     GNDIO | 15                                                                          94 | VCCIO 
    GNDINT | 16                                                                          93 | VCCINT 
        a4 | 17                                                                          92 | RESERVED 
  RESERVED | 18                                                                          91 | r6 
  RESERVED | 19                             EPF10K20TC144-3                              90 | RESERVED 
        in | 20                                                                          89 | RESERVED 
       ar0 | 21                                                                          88 | qd 
       ar1 | 22                                                                          87 | clr 
       ar2 | 23                                                                          86 | DP 

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