kand2.vhd

Fire&password数字系统实验

--two inputs and gate description
library ieee;
use ieee.std_logic_1164.all;

entity kand2 is
         port(A,B  : in std_logic;
              C    : out std_logic);
end kand2;

architecture kand2_arc of kand2 is
begin
     C <= A and B;
end kand2_arc;