decoder2_4.map.summary

数字系统设计中的全加器、10进制计数器、2-4译码器、摩尔状态机、2-1路选择器的源代码

Analysis & Synthesis Status : Successful - Tue Mar 25 22:11:31 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : decoder2_4
Top-level Entity Name : decoder2_4
Family : Stratix
Total logic elements : 4
Total pins : 7
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0