allplus.tan.qmsg

来自「数字系统设计中的全加器、10进制计数器、2-4译码器、摩尔状态机、2-1路选择器」· QMSG 代码 · 共 6 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Mar 25 23:00:22 2008 " "Info: Processing started: Tue Mar 25 23:00:22 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off ALLPLUS -c ALLPLUS --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off ALLPLUS -c ALLPLUS --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "A Si 8.593 ns Longest " "Info: Longest tpd from source pin \"A\" to destination pin \"Si\" is 8.593 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.087 ns) 1.087 ns A 1 PIN PIN_A17 2 " "Info: 1: + IC(0.000 ns) + CELL(1.087 ns) = 1.087 ns; Loc. = PIN_A17; Fanout = 2; PIN Node = 'A'" {  } { { "d:/quartus ii/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus ii/win/TimingClosureFloorplan.fld" "" "" { A } "NODE_NAME" } } { "ALLPLUS.vhd" "" { Text "D:/Quartus II/ALLPLUS/ALLPLUS.vhd" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.699 ns) + CELL(0.280 ns) 5.066 ns Si~15 2 COMB LC_X7_Y30_N2 1 " "Info: 2: + IC(3.699 ns) + CELL(0.280 ns) = 5.066 ns; Loc. = LC_X7_Y30_N2; Fanout = 1; COMB Node = 'Si~15'" {  } { { "d:/quartus ii/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus ii/win/TimingClosureFloorplan.fld" "" "3.979 ns" { A Si~15 } "NODE_NAME" } } { "ALLPLUS.vhd" "" { Text "D:/Quartus II/ALLPLUS/ALLPLUS.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.123 ns) + CELL(2.404 ns) 8.593 ns Si 3 PIN PIN_B17 0 " "Info: 3: + IC(1.123 ns) + CELL(2.404 ns) = 8.593 ns; Loc. = PIN_B17; Fanout = 0; PIN Node = 'Si'" {  } { { "d:/quartus ii/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus ii/win/TimingClosureFloorplan.fld" "" "3.527 ns" { Si~15 Si } "NODE_NAME" } } { "ALLPLUS.vhd" "" { Text "D:/Quartus II/ALLPLUS/ALLPLUS.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.771 ns ( 43.88 % ) " "Info: Total cell delay = 3.771 ns ( 43.88 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.822 ns ( 56.12 % ) " "Info: Total interconnect delay = 4.822 ns ( 56.12 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus ii/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus ii/win/TimingClosureFloorplan.fld" "" "8.593 ns" { A Si~15 Si } "NODE_NAME" } } { "d:/quartus ii/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus ii/win/Technology_Viewer.qrui" "8.593 ns" { A A~out0 Si~15 Si } { 0.000ns 0.000ns 3.699ns 1.123ns } { 0.000ns 1.087ns 0.280ns 2.404ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Mar 25 23:00:22 2008 " "Info: Processing ended: Tue Mar 25 23:00:22 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}